參數(shù)資料
型號： MC68HC11K0VFU3
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT MICROCONTROLLER
中文描述： 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PQFP80
封裝： QFP-80
文件頁數(shù)： 46/80頁
文件大?。?/td> 420K
代理商： MC68HC11K0VFU3
MOTOROLA
46
M68HC11 K Series
MC68HC11KTS/D
PT —Parity Type
Refer to
7 Serial Communications Interface
.
DDF[7:0] —Data Direction for Port F
0 = Corresponding pin configured for input
1 = Corresponding pin configured for output
Reset state is mode dependent. In single-chip or bootstrap modes, port F is high-impedance input with
selectable internal pull-up resistors. In expanded or test modes, port F pins are low order address out-
puts and PORTF is not in the memory map.
Port H pins reset to high-impedance inputs with selectable internal pull-up resistors. In expanded and
special test modes, reset also causes PH7 to be configured as CSPROG.
DDH[7:0] —Data Direction for Port H
0 = Bits set to zero to configure corresponding I/O pin for input only
1 = Bits set to one to configure corresponding I/O pin for output
PORTE
—Port E Data
$000A
Bit 7
PE7
I
6
5
4
3
2
1
Bit 0
PE0
I
PE6
I
PE5
I
PE4
I
PE3
I
PE2
I
PE1
I
RESET:
Alt. Pin
Func.:
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
DDRF
—Data Direction Register for Port F
$0003
Bit 7
DDF7
0
6
5
4
3
2
1
Bit 0
DDF0
0
DDF6
0
DDF5
0
DDF4
0
DDF3
0
DDF2
0
DDF1
0
RESET:
PORTF
—Port F Data
$0005
Bit 7
PF7
6
5
4
3
2
1
Bit 0
PF0
PF6
PF5
PF4
PF3
PF2
PF1
S. Chip or
Boot:
RESET:
Expan. or
Test:
PF7
I
PF6
I
PF5
I
PF4
I
PF3
I
PF2
I
PF1
I
PF0
I
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
PORTH
—Port H Data
$007C
Bit 7
PH7
I
6
5
4
3
2
1
Bit 0
PH0
I
PW1
PH6
I
CSGP2
PH5
I
CSGP1
PH4
I
CSIO
PH3
I
PW4
PH2
I
PW3
PH1
I
PW2
RESET:
Alt. Pin
Func.:
CSPROG
DDRH
—Data Direction Register for Port H
$007D
Bit 7
DDH7
0
6
5
4
3
2
1
Bit 0
DDH0
0
DDH6
0
DDH5
0
DDH4
0
DDH3
0
DDH2
0
DDH1
0
RESET:
相關(guān)PDF資料
PDF描述
MC68HC11K0VFU4 8-BIT MICROCONTROLLER
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