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參數(shù)資料
| 型號： | MC68HC08QY2VDTE |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | 0.65 MM PITCH, LEAD FREE, TSSOP-16 |
| 文件頁數(shù)： | 167/176頁 |
| 文件大小： | 1124K |
| 代理商： | MC68HC08QY2VDTE |
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Oscillator Module (OSC)
MC68HC08QY/QT Family Data Sheet, Rev. 2
90
Freescale Semiconductor
Figure 11-3 shows how BUSCLKX4 is derived from INTCLK and OSC2 can output BUSCLKX4 by setting
OSC2EN.
11.3.2.1 Internal Oscillator Trimming
OSCTRIM allows a clock period adjustment of +127 and –128 steps. Increasing the OSCTRIM value
increases the clock period, which decreases the clock frequency. Trimming allows the internal clock
frequency to be fine tuned to the target frequency.
All devices are factory programmed with a trim value as specified in the ROM order form. This trim value
is stored in memory location, $FFC0. The trim value is not automatically loaded into the OSCTRIM
register. User software must copy the trim value from $FFC0 into OSCTRIM if needed.
11.3.2.2 Internal to External Clock Switching
When external clock source (external OSC, RC, or XTAL) is desired, the user must perform the following
steps:
1.
For external crystal circuits only, configure OSCOPT[1:0] to external crystal. To help precharge an
external crystal oscillator, momentarily configure OSC2 as an output and drive it high for several
cycles. This can help the crystal circuit start more robustly.
2.
Configure OSCOPT[1:0] and ECFS[1:0] according to 11.8.1 Oscillator Status and Control Register.
The oscillator module control logic will then enable OSC1 as an external clock input and, if the
external crystal option is selected, OSC2 will also be enabled as the clock output. If RC oscillator
option is selected, enabling the OSC2 output may change the bus frequency.
3.
Create a software delay to provide the stabilization time required for the selected clock source
(crystal, resonator, RC). A good rule of thumb for crystal oscillators is to wait 4096 cycles of the
crystal frequency; i.e., for a 4-MHz crystal, wait approximately 1 ms.
4.
After the stabilization delay has elapsed, set ECGON.
After ECGON set is detected, the OSC module checks for oscillator activity by waiting two external clock
rising edges. The OSC module then switches to the external clock. Logic provides a coherent transition.
The OSC module first sets ECGST and then stops the internal oscillator.
11.3.2.3 External to Internal Clock Switching
After following the procedures to switch to an external clock source, it is possible to go back to the internal
source. By clearing the OSCOPT[1:0] bits and clearing the ECGON bit, the external circuit will be
disengaged. The bus clock will be derived from the selected internal clock source based on the ICFS[1:0]
bits.
11.3.3 External Oscillator
The external oscillator option is designed for use when a clock signal is available in the application to
provide a clock source to the MCU. The OSC1 pin is enabled as an input by the oscillator module. The
clock signal is used directly to create BUSCLKX4 and also divided by two to create BUSCLKX2.
In this configuration, the OSC2 pin cannot output BUSCLKX4. The OSC2EN bit will be forced clear to
enable alternative functions on the pin.
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