
Timer Interface Module (TIM)
Functional Description
MC68HC(9)08LJ60 — Rev. 1.0
Advance Information
MOTOROLA
Timer Interface Module (TIM)
269
NON-DISCLOSURE
AGREEMENT
REQUIRED
16.4.3 Output Compare
With the output compare function, the TIM can generate a periodic pulse
with a programmable polarity, duration, and frequency. When the
counter reaches the value in the registers of an output compare channel,
the TIM can set, clear, or toggle the channel pin. Output compares can
generate TIM CPU interrupt requests or TIM DMA service requests.
NOTE:
This device does not have output compare pins.
16.4.3.1 Unbuffered Output Compare
Any output compare channel can generate unbuffered output compare
unbuffered because changing the output compare value requires writing
the new value over the old value currently in the timer channel registers.
An unsynchronized write to the timer channel registers to change an
output compare value could cause incorrect operation for up to two
counter overflow periods. For example, writing a new value before the
counter reaches the old value but after the counter reaches the new
value prevents any compare during that counter overflow period. Also,
using a timer overflow interrupt routine to write a new, smaller output
compare value may cause the compare to be missed. The timer may
pass the new value before it is written.
Use these methods to synchronize unbuffered changes in the output
compare value on channel x:
When changing to a smaller value, enable channel x output
compare interrupts and write the new value in the output compare
interrupt routine. The output compare interrupt occurs at the end
of the current output compare pulse. The interrupt routine has until
the end of the counter overflow period to write the new value.
When changing to a larger output compare value, enable channel
x timer overflow interrupts and write the new value in the timer
overflow interrupt routine. The timer overflow interrupt occurs at
the end of the current counter overflow period. Writing a larger
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.