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| 型號： | MC68EC000EI8R2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 4/26頁 |
| 文件大小： | 0K |
| 描述： | IC MPU 32BIT 85MHZ 68-PLCC |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 系列： | M680x0 |
| 處理器類型： | M680x0 32-位 |
| 速度： | 8MHz |
| 電壓： | 3.3V，5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 68-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 68-PLCC（25x25） |
| 包裝： | 帶卷 (TR) |
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12
M68000 USER’S MANUAL ADDENDUM
MOTOROLA
7.0 MC68SEC000 AC ELECTRICAL SPECIFICATIONS — READ AND
WRITE CYCLES
Add the following table and Figures 9 and 10 to Section 10.16.
Applies to 3.3V and 5V.
(GND = 0 V; TA = TL to TH; see Figures 3 and 4)
NUM
CHARACTERISTIC
10MHz
16MHz
20MHz
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
6
Clock Low to Address Valid
—
35
—
30
—
25
ns
6A
Clock High to FC Valid
0
35
0
30
0
25
ns
7
Clock High to Address, Data Bus High Impedance (Maximum)
(Write)
—55—50—42
ns
8
Clock High to Address, FC Invalid (Minimum)
0—0—0—
ns
91
Clock High to AS, LDS, UDS Asserted
3
35
3
30
3
25
ns
112
Address Valid to AS, LDS, UDS Asserted (Read)/ AS Asserted
(Write)
20—15—10—
ns
11A2
FC Valid to AS, LDS, UDS Asserted (Read)/ AS Asserted (Write)
45
—
45
—
40
—
ns
121
Clock Low to AS, LDS, UDS Negated
3
35
3
30
3
25
ns
132
AS, LDS, UDS Negated to Address, FC Invalid
15
—
15
—
10
—
ns
142
AS (and LDS, UDS Read) Width Asserted
195
—
120
—
100
—
ns
14A2
LDS, UDS Width Asserted (Write)
95
—
60
—
50
—
ns
152
AS, LDS, UDS Width Negated
105
—
60
—
50
—
ns
16
Clock High to Control Bus High Impedance
—
55
—
50
—
42
ns
172
AS, LDS, UDS Negated to R/W Invalid
15
—
15
—
10
—
ns
181
Clock High to R/W High (Read)
0
35
0
30
0
25
ns
201
Clock High to R/W Low (Write)
0
35
0
30
0
25
ns
20A2,6 AS Asserted to R/W Low (Write)
—
10
—
10
—
10
ns
212
Address Valid to R/W Low (Write)
0—0—0—
ns
21A2
FC Valid to R/W Low (Write)
50
—
30
—
25
—
ns
222
R/W Low to DS Asserted (Write)
50
—
30
—
25
—
ns
23
Clock Low to Data-Out Valid (Write)
—
35
—
30
—
25
ns
252
AS, LDS, UDS Negated to Data-Out Invalid (Write)
30
—
15
—
10
—
ns
262
Data-Out Valid to LDS, UDS Asserted (Write)
30
—
15
—
10
—
ns
275
Data-In Valid to Clock Low (Setup Time on Read)
5—5—5—
ns
282
AS, LDS, UDS Negated to DTACK Negated (Asynchronous Hold)
0
110
0
110
0
95
ns
28A
Clock High to DTACK Negated
0
110
0
110
0
95
ns
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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