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Table of Contents
Paragraph
Title
Page
Number
MOTOROLA
MC68360 USER’S MANUAL
xi
7.6.4.2.3
IDMA Commands (INIT_IDMA)............................................................. 7-38
7.6.4.3
Starting the IDMA .................................................................................. 7-38
7.6.4.4
Requesting IDMA Transfers .................................................................. 7-39
7.6.4.4.1
Internal Maximum Rate ......................................................................... 7-39
7.6.4.4.2
Internal Limited Rate ............................................................................. 7-39
7.6.4.4.3
External Burst Mode.............................................................................. 7-40
7.6.4.4.4
External Cycle Steal .............................................................................. 7-42
7.6.4.5
IDMA Bus Arbitration............................................................................. 7-43
7.6.4.6
IDMA Operand Transfers ...................................................................... 7-45
7.6.4.6.1
Dual Address Mode............................................................................... 7-45
7.6.4.6.2
Single Address Mode (Flyby Transfers) ................................................ 7-48
7.6.4.6.3
Fast-Termination Option........................................................................ 7-50
7.6.4.6.4
Externally Recognizing IDMA Operand Transfers................................. 7-51
7.6.4.7
Bus Exceptions...................................................................................... 7-51
7.6.4.7.1
Reset ..................................................................................................... 7-51
7.6.4.7.2
Bus Error ............................................................................................... 7-51
7.6.4.7.3
Retry...................................................................................................... 7-51
7.6.4.8
Ending the IDMA Transfer..................................................................... 7-52
7.6.4.8.1
Single Buffer Mode Termination............................................................ 7-52
7.6.4.8.2
Auto Buffer Mode Termination. ............................................................. 7-53
7.6.4.8.3
Buffer Chaining Mode Termination........................................................ 7-54
7.6.5
IDMA Examples.................................................................................... 7-55
7.6.5.1
Single Buffer Examples ......................................................................... 7-55
7.6.5.2
Buffer Chaining Example....................................................................... 7-55
7.6.5.3
Auto Buffer Example ............................................................................. 7-56
7.7
SDMA Channels.................................................................................... 7-57
7.7.1
SDMA Bus Arbitration and Bus Transfers ............................................. 7-57
7.7.2
SDMA Registers.................................................................................... 7-59
7.7.2.1
SDMA Configuration Register (SDCR).................................................. 7-59
7.7.2.2
SDMA Status Register (SDSR) ............................................................. 7-61
7.7.2.3
SDMA Address Register (SDAR) .......................................................... 7-61
7.8
Serial Interface with Time Slot Assigner................................................ 7-62
7.8.1
SI Key Features.................................................................................... 7-62
7.8.2
TSA Overview ...................................................................................... 7-64
7.8.3
Enabling Connections to the TSA ........................................................ 7-67
7.8.4
SI RAM ................................................................................................. 7-68
7.8.4.1
One Multiplexed Channel with Static Frames ....................................... 7-69
7.8.4.2
One Multiplexed Channel with Dynamic Frames .................................. 7-69
7.8.4.3
Two Multiplexed Channels with Static Frames...................................... 7-70
7.8.4.4
Two Multiplexed Channels with Dynamic Frames................................. 7-71
7.8.4.5
Programming SI RAM Entries ............................................................... 7-72
7.8.4.6
SI RAM Programming Example ............................................................ 7-75
7.8.4.7
SI RAM Dynamic Changes.................................................................... 7-75
7.8.5
SI Registers........................................................................................... 7-77
7.8.5.1
SI Global Mode Register (SIGMR) ........................................................ 7-77