參數(shù)資料
型號： MC56F8346
廠商： Motorola, Inc.
英文描述： 56F8346 16-bit Hybrid Controller
中文描述： 56F8346 16位混合控制器
文件頁數(shù)： 15/160頁
文件大?。?/td> 1415K
代理商： MC56F8346
56F8346 Signal Pins
56F8346 Technical Data
Preliminary
15
V
CAP
1
51
Supply
Supply
V
CAP
1 - 4
— When OCR_DIS is tied to V
SS
(regulator
enabled), connect each
pin to a 2.2
μ
F or greater bypass
capacitor in order to bypass the core logic voltage
regulator, required for proper chip operation. When
OCR_DIS is tied to V
DD
(regulator disabled), these pins
become V
DD_CORE
and should be connected to a
regulated 2.5V power
supply.
Note: This bypass is required even if the chip is
powered with an external supply.
V
CAP
2
128
V
CAP
3
83
V
CAP
4
15
V
PP
1
125
Input
Input
V
PP
1 - 2
—
These pins should be left unconnected as an
open circuit for normal functionality.
V
PP
2
2
CLKMODE
87
Input
Input
Clock Input Mode Selection
— This input determines the
function of the XTAL and EXTAL pins.
1 = External clock input on XTAL is used to directly drive
the input clock of the chip. The EXTAL pin should be
grounded.
0 = A crystal or ceramic resonator should be connected
between XTAL and EXTAL.
EXTAL
82
Input
Input
External Crystal Oscillator Input
— This input can be
connected to an 8MHz external crystal. Tie this pin low if
XTAL is driven by an external clock source.
XTAL
81
Input/
Output
Chip-driven
Crystal Oscillator Output
— This output connects the
internal crystal oscillator output to an external crystal.
If an external clock is used, XTAL must be used as the
input and EXTAL connected to GND.
The input clock can be selected to provide the clock
directly to the core. This input clock can also be selected
as the input clock for the on-chip PLL.
CLKO
3
Output
Tri-Stated
Clock Output
— This pin outputs a buffered clock signal.
Using the SIM CLKO Select Register (SIM_CLKOSR), this
pin can be programmed as any of the following: disabled,
CLK_MSTR (system clock), IPBus clock, oscillator output,
prescaler clock and postscaler clock. Other signals are
also available for test purposes.
See
Section 6.5.7
for details.
Table 2-2 56F8346 Signal and Package Information for the 144 Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料
PDF描述
MC56F8346MFV60 56F8346 16-bit Hybrid Controller
MC56F8346VFV60 56F8346 16-bit Hybrid Controller
MC56F8356 56F8356 16-bit Hybrid Controller
MC56F8356VFV60 56F8356 16-bit Hybrid Controller
MC56F8356MFV60 56F8356 16-bit Hybrid Controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8346EVM 制造商:Freescale Semiconductor 功能描述:Tools Development kit Kit Contents:Inst
MC56F8346MFV60 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8346MFVE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8346VFV60 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8346VFVE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CNTRLR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*