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參數(shù)資料
| 型號(hào)： | MC54HC595 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs |
| 中文描述： | 8位Serial-Input/Serial或并行輸出移位與鎖存3注冊(cè)態(tài)輸出 |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大?。?/td> | 297K |
| 代理商： | MC54HC595 |
MC54/74HC595A
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
6
SWITCHING WAVEFORMS
SERIAL
INPUT A
50%
50%
LATCH
CLOCK
VCC
GND
VALID
tsu
th
Figure 5.
SHIFT
CLOCK
OUTPUT
SQH
tr
tf
VCC
GND
90%
50%
10%
90%
50%
10%
tPLH
tPHL
tTLH
tTHL
tw
1/fmax
RESET
OUTPUT
SQH
SHIFT
CLOCK
tw
50%
50%
50%
VCC
GND
VCC
GND
tPHL
trec
tsu
50%
50%
VCC
GND
LATCH
CLOCK
QA–QH
OUTPUTS
50%
tPLH
tPHL
tTLH
tTHL
90%
50%
10%
VCC
GND
VCC
GND
SHIFT
CLOCK
LATCH
CLOCK
Figure 3.
VCC
GND
tw
Figure 1.
Figure 2.
Figure 4.
Figure 6.
OUTPUT Q
OUTPUT Q
50%
50%
90%
10%
tPZL
tPLZ
tPZH
tPHZ
VCC
GND
HIGH
IMPEDANCE
VOL
VOH
HIGH
IMPEDANCE
OUTPUT
ENABLE
50%
TEST CIRCUITS
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
1 k
Figure 7.
Figure 8.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC54HC595AJ | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs |
| MC54HC597AJ | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:8-Bit Serial or Parallel-Input/Serial-Output Shift Register with Input Latch |
| MC54HC597J | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:8-Bit Serial or Parallel-Input/Serial-Output Shift Register with Input Latch |
| MC54HC640AJ | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:Octal 3-State Inverting Bus Transeceiver |
| MC54HC646J | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:Octal 3-State Bus Transceivers and D Flip-Flops |
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