參數(shù)資料
型號(hào)： MC44BS373CAFC
廠商： Freescale Semiconductor
文件頁數(shù)： 22/52頁
文件大?。?/td> 0K
描述： IC MODULATOR AUD/VID U/V 20-QFN
標(biāo)準(zhǔn)包裝： 490
類型： NTSC/PAL 調(diào)制器
應(yīng)用： 音頻/視頻，VCR，機(jī)頂盒
安裝類型： 表面貼裝
封裝/外殼： 20-VQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 20-QFN 裸露焊盤（5x5）
包裝： 托盤
MC44BS373CA Data Sheet
High Speed I2C Compatible Bus
16.3 Level Definitions
SDA/SCL high and low levels are designed to be compatible with 0–5 V and 0–3.3 V SDA/SCL signals.
Figure 12. SDA/SCL Levels
16.4 High-Speed I2C-Compatible Bus Format
Figure 13. I2C Bus Timing
16.5 I2C Write-Mode Format and Bus Receiver
NOTE
The information in this section concerning I2C address selection applies to
the 20-pin package only. The I2C address in the 16-pin packages is set at
0xCA and cannot be changed.
It is possible to select one specific I2C address from among four available addresses. This selection is
controlled by an external pin (CAS) where an external resistor is connected to ground. By changing the
value of this resistor it is possible to change the DC level on the multi-level CAS pin. This DC level is
compared against internal thresholds (1.65, 0.42 and 2.82 V) and, depending on the result, one of the
available addresses is selected according to Table 29.
When chip addresses CC or C8 are selected, the DC level at the CAS pin is set by a ratio of an external
resistor (33 K
or 180 K ±10%) and the internal pull-up resistor (85 K typical with a tolerance of 40%
worst case).
Table 29. Chip Address Selected Versus CAS Pin Level
External Resistor on Pin CAS
I2C address
Open
0xCA
180-K
pull-down
0xC8
33-K
pull-down
0xCC
0 (connected to ground)
0xCE
SDA
0V
Vcc
Vih
Vil
Dead Band
1
2
3
4
5
6
7
8
9 10
14
11 12 13
45
44
15
19
16 17 18
STA
Chip Address (0xCA)
ACK
First Data Byte (C1 or FM)
Data
ACK
Stop
SCL
SDA
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