參數(shù)資料
型號: MC44724VFU
廠商: Motorola, Inc.
英文描述: Digital Video Encoder
中文描述: 數(shù)字視頻編碼器
文件頁數(shù): 30/39頁
文件大?。?/td> 518K
代理商: MC44724VFU
MC44724/5 Rev 0.21 03/25/97
No.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
30
h-delay10
h-delay9
h-delay8
h-delay7
h-delay6
h-delay5
h-delay4
h-delay3
: delay on Hsync with reference to DVIN data
0000_0000_000 : Hsync delay 0 delay
to
1111_1111_000 : Hsync delay +255 delay
Note : this h-delay can be also related with 71[3:0] register and can
delay totally +2023 delay(1111_1111_111) in H/V or H/ Fsync
slave mode.
Sub-address 7A : Hsync delay control (write only)
MSB
LSB
Register 7A
H-dela10 H-delay9 H-delay8 H-delay7
default : 0000_0000(bin)
H-delay6 H-delay5 H-delay4 H-delay3
Sub-address 78~79 : Sub-carrier phase control (write only)
MSB
LSB
Register 78
sc-ph9
sc-ph8
sc-ph7
sc-ph6
default : 0000_0000(bin)
sc-ph5
MSB
LSB
Register 79
default : 0000_0000(bin)
sc-ph9
sc-ph8
sc-ph7
sc-ph6
sc-ph5
sc-ph4
sc-ph3
sc-ph2
sc-ph1
sc-ph0
: sub-currier phase control
0000_0000 : sub-currier phase 0 degree (default)
to
1111_1111 : sub-currier phase 359 degree
sc-ph4
sc-ph3
sc-ph2
sc-ph1
sc-ph0
-
-
-
-
-
-
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