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參數(shù)資料
| 型號： | MC44605P |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | RW-S Series - Econoline Regulated DC-DC Converters; Input Voltage (Vdc): 05V; Output Voltage (Vdc): 05V; Power: 2W; DIP24 Low Profile Miniature Package; 1kVDC Isolation; Feedback Regulated Output; 2:1 Wide Range Voltage Input; Continuous Short Circuit Protection; Less than 7mm Height; SMD Pinning Option; Efficiency to 87% |
| 中文描述： | 0.75 A SWITCHING CONTROLLER, 250 kHz SWITCHING FREQ-MAX, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 328K |
| 代理商： | MC44605P |
MC44605
http://onsemi.com
13
Figure 6. Synchronization
Negative Active
Clamping System
Pin 9
–200 mV
R
E.H.T. OVP
Block
MC44605
VCC
sync
Synchro.
Signal
Demagnetization Section
This block is incorporated to detect the complete core
demagnetization in order to prevent the power MOSFET
from switching on if the converter is not in a dead time
phase. That is why this block inhibits any oscillator re–start
as long as the inductor current is not finished (from the
beginning of the on–time to the end of the demagnetization
phase).
In a fly–back, a good means to detect the demagnetization
phase consists in using the VCC winding voltage. In effect,
this voltage is:
— negative during the on–time,
— positive during the off–time,
— equal to zero for the dead–time with generally a
ringing (refer to Figure 7).
Figure 7. Demagnetization Detection
Vpin 8
0.75 V
65 mV
–0.33 V
Zero
Current
Detection
On–Time
Off–Time Dead–Time
That is why, the MC44605 demagnetization detection
consists of a comparator that compares the VCC winding
voltage to a reference that is typically equal to 65 mV.
A diode D is incorporated to clamp the positive applied
voltages while an active clamping system limit the negative
voltages to typically –0.33 V. This negative clamp level is
high enough to avoid the substrate diode switching on.
A latch system is incorporated to keep the
demagnetization block output level low as soon as a voltage
lower than 65 mV is detected and as long as a new restart is
produced (high level on the output (refer to Figure 8). This
process avoids that any ringing on the signal used on the
pin 8, disrupts the demagnetization detection (refer to
Figure 7). Finally, this method results in a very accurate
demagnetization phase detection, and the signal VDT drawn
from this block is high only for the dead time. Therefore, an
oscillator re–start and so, a new power switch conduction is
only allowed during the dead–time.
For a higher safety, the Vdemagout output of the
demagnetization block is also directly connected to the
output, to disable it during the demagnetization phase (refer
to the block diagram).
The demagnetization detection can be inhibited by
connecting pin 8 to the ground but in this case, a timer (about
3
μ
s) that is incorporated to set the latch when it can not be
set by Vdemagout, results in a minimum off–time (refer to
Figure 8).
Figure 8. Demagnetization Block
C DEM
Oscillator
Output
Buffer
R
Demag
S
Q
VCC
Negative Active
Clamping System
Pin 8
D
65 mV
Vdemag out
3 s
Q
VDT
Overvoltage Protection Section
The overvoltage arrangement compares a portion Vcc to
Vref (2,5 V) (refer to Figure 9). In fact, this threshold
corresponds to a VCC equal to to 17 V. When the Vcc is
higher than this level, the output is latched off until a new
circuit re–start.
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