參數(shù)資料
型號: MC3PHACVP
廠商: MOTOROLA INC
元件分類: 運動控制電子
英文描述: 3-Phase AC Motor Controller
中文描述: AC MOTOR CONTROLLER, PDIP28
封裝: PLASTIC, DIP-28
文件頁數(shù): 17/44頁
文件大?。?/td> 724K
代理商: MC3PHACVP
MC3PHAC/D
Features
MOTOROLA
3-Phase AC Motor Controller
17
The fault protection and prevention features are:
External Fault Monitoring
— The FAULTIN
pin accepts a digital signal
that indicates a fault has been detected via external monitoring circuitry.
A high level on this input results in the PWMs being immediately
disabled. Typical fault conditions might be a dc bus over voltage, bus
over current, or over temperature. Once this input returns to a logic low
level, the fault retry timer begins running, and PWMs are re-enabled
after the programmed timeout value is reached.
Lost Clock Protection
— If the signal on the OSC1 pin is lost
altogether, the MC3PHAC will immediately disable the PWM outputs to
protect the motor and power electronics. This is a special fault condition
in that it will also cause the MC3PHAC to be reset. Lost clock detection
is an important safety consideration, as many safety regulatory agencies
are now requiring a dead crystal test be performed as part of the
certification process.
Low V
DD
Protection
— Whenever V
DD
falls below V
LVR1
, an on-board
power supply monitor will reset the MC3PHAC. This allows the
MC3PHAC to operate properly with 5 volt power supplies of either 5 or
10 percent tolerance.
Bus Voltage Integrity Monitoring
— The DC_BUS
pin is monitored at
a 5.3 kHz frequency (4.0 kHz when the PWM frequency is set to
15.9 kHz), and any voltage reading outside of an acceptable window
constitutes a fault condition. In standalone mode, the window thresholds
are fixed at 4.47 volts (128 percent of nominal), and 1.75 volts
(50 percent of nominal), where nominal is defined to be 3.5 volts. In PC
master software mode, both top and bottom window thresholds can be
set independently to any value between 0 volts (0 percent of nominal),
and greater than 5 volts (143 percent of nominal), and can be changed
at any time. Once the DC_BUS
signal level returns to a value within the
acceptable window, the fault retry timer begins running, and PWMs are
re-enabled after the programmed timeout value is reached.
During power-up, it is possible that V
DD
could reach operating voltage
before the dc bus capacitor charges up to its nominal value. When the
dc bus integrity is checked, an under voltage would be detected and
treated as a fault, with its associated timeout period. To prevent this, the
MC3PHAC monitors the dc bus voltage during power-up in standalone
mode, and waits until it is higher than the under voltage threshold before
continuing. During this time, all MC3PHAC functions are suspended.
Once this threshold is reached, the MC3PHAC will continue normally,
with any further under voltage conditions treated as a fault.
If dc bus voltage monitoring is not desired, a voltage of
3.5 volts ± 5 percent should be supplied to the DC_BUS pin through an
impedance of between 4.7 k
and 15 k
.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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