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  • 參數(shù)資料
    型號: MC3S12C32
    廠商: Motorola, Inc.
    英文描述: 16-Bit Microcontroller
    中文描述: 16位微控制器
    文件頁數(shù): 1/16頁
    文件大?。?/td> 520K
    代理商: MC3S12C32
    MOTOROLA 2004
    This document contains information on a new product. Specifications and information herein are subject to change without notice.
    MOTOROLA
    SEMICONDUCTOR
    TECHNICAL DATA
    MC9S12C-FamilyPP
    Rev. 3, 12-May-04
    MC9S12C-Family
    Product Proposal
    16-Bit Microcontroller
    Based on Motorola’s market-leading flash technology, members of the MC9S12C-Family deliver the
    power and flexibility of our 16 Bit core (CPU12) family to a whole new range of cost and space sensitive,
    general purpose Industrial and Automotive network applications. MC9S12C-Family members are com-
    prised of standard on-chip peripherals including a 16-bit central processing unit (CPU12), up to 128K
    bytes of Flash EEPROM or ROM, up to 4K bytes of RAM, an asynchronous serial communications in-
    terface (SCI), a serial peripheral interface (SPI), an 8-channel 16-bit timer module (TIM), a 6-channel
    8-bit Pulse Width Modulator (PWM), an 8-channel, 10-bit analog-to-digital converter (ADC) and up to
    one CAN 2.0 A, B software compatible module (MSCAN12). The MC9S12C-Family has full 16-bit data
    paths throughout. The inclusion of a PLL circuit allows power consumption and performance to be ad-
    justed to suit operational requirements. In addition to the I/O ports available in each module, up to 10
    dedicated I/O port bits are available with Wake-Up capability from STOP or WAIT mode. The
    MC9S12C-Family is available in 48, 52 and 80 pin QFP packages, with the 80 Pin version pin compat-
    ible to the HCS12 B and D- Family derivatives.
    The C-Family includes ROM versions MC3S12C128/96/64/32/16 of all devices which provide a further
    cost reduction path for applications with high volume and stable code.
    Features
    16-bit HCS12 CORE
    — HCS12 CPU
    — MMC (memory map and interface)
    — INT (interrupt control)
    — BDM (background debug mode)
    — DBG12 (enhanced debug12 module including breakpoints and change-of-flow trace buffer)
    — Multiplexed Expansion Bus (available only in 80 pin package version)
    16-bit HCS12 CPU
    — Upward compatible with M68HC11 instruction set
    — Interrupt stacking and programmer’s model identical to M68HC11
    — Instruction queue
    — Enhanced indexed addressing
    Wake-up interrupt inputs
    — Up to 10-port bits available for wake up interrupt function
    Memory options
    — 16K, 32K, 64K, 96K and 128K Byte Flash EEPROM (erasable in 512-byte sectors) or
    — 16K, 32K, 64K, 96K and 128K Byte ROM
    — 2K and 4K Byte RAM
    Analog-to-Digital Converters
    — One 8-channel module with 10-bit resolution.
    — External conversion trigger capability
    Up to one 1M bit per second, CAN 2.0 A, B software compatible modules
    — Five receive and three transmit buffers
    F
    Freescale Semiconductor, Inc.
    For More Information On This Product,
    Go to: www.freescale.com
    n
    .
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    MC3S12HN32 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers
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