參數(shù)資料
型號: MC3PHAC
廠商: Motorola, Inc.
英文描述: 3-Phase AC Motor Controller
中文描述: 三相交流電機(jī)控制器
文件頁數(shù): 40/44頁
文件大?。?/td> 724K
代理商: MC3PHAC
MC3PHAC/D
40
3-Phase AC Motor Controller
MOTOROLA
To send data from a PC to the MC3PHAC, it is necessary to satisfy the serial
input of the MC3PHAC. In the idle condition, the serial input of the MC3PHAC
must be at a logic 1. To accomplish that, the transistor in U1 must be turned off.
The idle state of the transmit data line (TxD) from the PC serial port is a Mark
(–3 to –25 volts). Therefore, the diode in U1 is off and the transistor in U1 is off,
yielding a logic 1 to the MC3PHAC’s serial input. When the start bit is sent to
the MC3PHAC from the PC’s serial port, the PC’s TxD transitions from a Mark
to a Space (+3 to +25 volts), thus forward biasing the diode in U1. Forward
biasing the diode in D1 turns on the transistor in U1, providing a logic 0 to the
serial input of the MC3PHAC. Simply stated, the input half of the circuit
provides input isolation, signal inversion, and level shifting from the PC to the
MC3PHAC’s serial port. An RS-232 line receiver, such as an MC1489, serves
the same purpose without the optoisolation function.
To send data from the MC3PHAC to the PC’s serial port input, it is necessary
to satisfy the PC’s receive data (RxD) input requirements. In an idle condition,
the RxD input to the PC must be at Mark (–3 to –25 volts). The data terminal
ready output (DTR) on the PC outputs a Mark when the port is initialized. The
request to send (RTS) output is set to a Space (+3 to +25 volts) when the PC’s
serial port is initialized. Because the interface is half-duplex, the PC’s TxD
output is also at a Mark, as it is idle. The idle state of the MC3PHAC’s serial
port output is a logic 1. The logic 1 out of the MC3PHAC’s serial port output port
forces the diode in U2 to be turned off. With the diode in U2 turned off, the
transistor in U2 is also turned off. The junction of D2 and D3 are at a Mark (–3
to –25 volts). With the transistor in U2 turned off, the input is pulled to a Mark
through current limiting resistor R3, satisfying the PC’s serial input in an idle
condition. When a start bit is sent from the MC3PHAC’s serial port, it transitions
to a logic 0. That logic 0 turns on the diode in U2, thus turning on the transistor
in U2. The conducting transistor in U2 passes the voltage output from the PC’s
RTS output, that is now at a Space (+3 to +25 volts), to the PC’s receive data
(RxD) input. Capacitor C1 is a bypass capacitor used to stiffen the Mark signal.
The output half of the circuit provides output isolation, signal inversion, and
level shifting from the MC3PHAC’s serial output port to the PC’s serial port. An
RS-232 line driver, such as a MC1488, serves the same purpose without the
optoisolation function.
Mechanical Data
This subsection provides case outline drawings for:
Plastic 28-pin DIP,
Figure 20
Plastic 28-pin SOIC,
Figure 21
Plastic 32-pin QFP,
Figure 22
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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