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參數(shù)資料
| 型號： | MC33999 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 16-Output Switch with SPI and PWM Control |
| 中文描述： | 16 - SPI和輸出的PWM控制開關(guān) |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 627K |
| 代理商： | MC33999 |
33999
12
Go to: www.freescale.com
ON/OFF Control Register
To program the 16 outputs of the 33999 ON or OFF, a 24-bit
serial stream of data is entered into the SI pin. The first 8 bits
of the control word are used to identify the on/off command and
the remaining 16 bits are used to turn ON or OFF the specific
output driver.
Open Load Current Enable Control Register
The Open Load Enable Control register is provided to enable
or disable the 50
μ
A open load detect pull-down current. This
feature allows the device to be used in LED applications.
Power-ON Reset (POR) or the
RST
pin or the RESET
command disables the 50
μ
A pull-down current. No open load
fault will be reported with the pull-down current disabled. For
open load to be active, the user must program the Open Load
Current Enable Control register with logic [1].
Global Shutdown/Retry Control Register
The Global Shutdown/Retry Control register allows the user
to select the global fault strategy for the outputs. The
Overvoltage control bit (bit 16) sets the operation of the outputs
when returning from overvoltage. Setting the Overvoltage bit to
logic [0] will force all outputs to remain OFF when V
PWR
returns
to normal level. Setting the Overvoltage bit to logic [1] will
command outputs to resume their previous state when V
PWR
returns to normal level. Bit 17 is the global thermal bit. When
bit 17 is set to logic [0], all outputs will shut down when thermal
limit is reached and remain off even after cooled. With bit 17 set
to logic [1], all outputs will shut down when thermal limit is
reached and will retry when cooled.
Short Fault Protect Disable (SFPD) Control Register
All outputs contain a current limit and thermal shutdown with
programmable retry. The SFPD control bits are used for fast
shutdown of the output when an overcurrent condition is
detected but thermal shutdown has not been achieved.
The SFPD Control register allows selection of specific
outputs for incandescent lamp loads and specific outputs for
inductive loads. By programming the specific SFPD bit as
logic [1], output will rely on Overtemperature Shutdown only.
Programming the specific SFPD bit as logic [0] will shut down
the output after 100
μ
s to 450
μ
s during turn on into short
circuit. The decision for shutdown is based on output drain-to-
source voltage (V
DS
) > 2.7 V.
This feature is designed to
provide protection to loads that experience more than expected
currents and require fast shutdown. The 33999 is designed to
operate in both modes with full device protection.
PWM Enable Register
The PWM Enable register determines the outputs that are
PWM controlled. The first 8 bits of the 24 bit SPI message word
are used to identify the
PWM
enable command, and the
remaining 16 bits are used to enable or disable the PWM of the
output drivers.
A logic [1] in the PWM Enable register allows the user to OR/
AND
the PWM input with SPI Control bit and disables the
specific parallel control input (PWM0, PWM1, PWM6, PWM7,
PWM8, PWM9, PWM14, and PWM15).
A logic [0] in the PWM Enable register will disable the PWM
to a specific output and allow the user to use the parallel PWM
control inputs (PWM0, PWM1, PWM6, PWM7, PWM8, PWM9,
PWM14, and PWM15) and the SPI ON/OFF Control bits.
Power-ON Reset (POR) or the
RST
pin or the RESET
command will set the PWM enable register to logic[0].
AND/OR Control Register
The AND/OR Control register describes the condition by
which the PWM pin controls the output driver. A logic [0] in the
AND/OR Control register will AND the PWM pin with the control
bit in the SPI Control register. Likewise, a logic [1] in the AND/
OR Control register will OR the PWM pin with the control bit in
the ON/OFF Control register (see
Figure 6
).
Figure 6. PWM Control Logic Diagram
Serial Output (SO) Response Register
Fault reporting is accomplished through the SPI interface. All
logic [1]s received by the MCU via the SO pin indicate fault. All
logic [0]s received by the MCU via the SO pin indicate no fault.
All fault bits are cleared on the positive edge of
CS
. SO bits 15
to 0 represent the fault status of outputs 15 to 0. SO bits 21 to
16 will always return logic [0]. Bit 22 provides overvoltage
condition status, and bit 23 is set when any fault is present in
the IC. The timing between two write words must be greater
than 450
μ
s to allow adequate time to sense and report the
proper fault status.
Reset Command
The RESET command turns all outputs OFF and sets all
internal registers to their Power-ON Reset state (refer to
Table 1
).
On/Off Control Bit
On/Off control Bit
PWM IN
PWM IN
AND/OR Control Bit
On/Off Control Bit
PWM Enable Bit
To Gate
Control
F
Freescale Semiconductor, Inc.
For More Information On This Product,
n
.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| MC33999EK | 功能描述:多路器開關(guān) IC 16 LOW SIDE PWM&SPI RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時間（最大值）: 關(guān)閉時間（最大值）: 傳播延遲時間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16 |
| MC33999EK | 制造商:Freescale Semiconductor 功能描述:IC SWITCH 16 OUT SPI/PWM 54SOIC |
| MC33999EKR2 | 功能描述:多路器開關(guān) IC 16 LOW SIDE PWM&SPI RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時間（最大值）: 關(guān)閉時間（最大值）: 傳播延遲時間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16 |
| MC3399DW | 制造商: 功能描述: 制造商:undefined 功能描述: |
| MC340 | 制造商:Motorola Inc 功能描述:Bipolar Junction Transistor, NPN Type, TO-126 |
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