參數(shù)資料
型號(hào): MC33972
廠商: Motorola, Inc.
英文描述: Multiple Switch Detection Interface with Suppressed Wake-Up
中文描述: 多交換檢測接口,具有抑制喚醒
文件頁數(shù): 7/28頁
文件大小: 506K
代理商: MC33972
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33972
7
DYNAMIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions of 3.1 V
V
DD
5.25 V, 8.0 V
V
PWR
16 V, -40
°
C
T
C
125
°
C, unless otherwise noted.
Where applicable, typical values reflect the parameter’s approximate average value with V
PWR
= 13 V, T
A
= 25
°
C.
Characteristic
Symbol
Min
Typ
Max
Unit
SWITCH INPUT
Pulse Wetting Current Time
t
PULSE(ON)
15
16
20
ms
Interrupt Delay Time
Normal Mode
t
INT-DLY
5.0
16
μ
s
Sleep Mode Switch Scan Time
t
SCAN
100
200
300
μ
s
Calibrated Scan Timer Accuracy
Sleep Mode
t
SCAN TIMER
10
%
Calibrated Interrupt Timer Accuracy
Sleep Mode
t
INT TIMER
10
%
DIGITAL INTERFACE TIMING
(Note 13)
Required Low-State Duration on V
PWR
for Reset
(Note 14)
V
PWR
0.2 V
t
RESET
10
μ
s
Falling Edge of CS to Rising Edge of SCLK
Required Setup Time
t
LEAD
100
ns
Falling Edge of SCLK to Rising Edge of
CS
Required Setup Time
t
LAG
50
ns
SI to Falling Edge of SCLK
Required Setup Time
t
SI(SU)
16
ns
Falling Edge of SCLK to SI
Required Hold Time
t
SI(HOLD)
20
ns
SI,
CS
, SCLK Signal Rise Time
(Note 15)
t
R(SI)
5.0
ns
SI,
CS
, SCLK Signal Fall Time
(Note 15)
t
F(SI)
5.0
ns
Time from Falling Edge of
CS
to SO Low Impedance
(Note 16)
t
SO(EN)
55
ns
Time from Rising Edge of
CS
to SO High Impedance
(Note 17)
t
SO(DIS)
55
ns
Time from Rising Edge of SCLK to SO Data Valid
(Note 18)
t
VALID
25
55
ns
Notes
13.
14.
15.
16.
17.
18.
These parameters are guaranteed by design. Production test equipment uses 4.16 MHz, 5.0 V SPI interface.
This parameter is guaranteed by design but not production tested.
Rise and Fall time of incoming SI,
CS
, and SCLK signals suggested for design consideration to prevent the occurrence of double pulsing.
Time required for valid output status data to be available on SO terminal.
Time required for output states data to be terminated at SO terminal.
Time required to obtain valid data out from SO following the rise of SCLK with 200 pF load.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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