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| 型號(hào)： | MC33389DDW |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 18/49頁 |
| 文件大小： | 0K |
| 描述： | IC SYSTEM BASE W/CAN 28-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 控制器類型： | 系統(tǒng)基礎(chǔ)芯片 |
| 接口： | CAN |
| 電源電壓： | 5.5 V ~ 18 V |
| 電流 - 電源： | 45mA |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC W |
| 包裝： | 管件 |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
25
33389
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
The switches can be directly connected to VBAT or to V3. The
SBC must be properly configured by setting the bit WI2V3 in
the V3 register. In this case, wake-ups are only detected
when V3 is ON. It can take advantage of the V3 Cyclic Sense
feature. If both Cyclic Sense and Forced Wake-Up are
enabled by the SPI in the Sleep mode, only Cyclic Sense will
be active.
Options for Wake Input
Different conditions for wake-up can be chosen for wake-
up input pins (via SPI in the Wake-Up Input Control Register
(WUICR).
No Wake-Up— Wake-ups are not detected whatever
occurs on wake-up inputs.
High-State—If the input pin voltage is above the detection
threshold during more than a 20
s filter time, a wake-up
is detected. A flag is set in the WUISR.
Low-State—If the input pin voltage is below the detection
threshold during more than a 20
s filter time, a wake-up
is detected. A flag is set in the WUISR.
Change of state—Each change of the wake-up input pin is
considered as a wake-up if it lasts more than a 20
s filter
time. The first reference state (no wake-up) is the wake-up
input state when the SBC is programmed to this option. A
flag is set in the WUISR.
Multiple Sampling Events—When wake-up inputs are
used with V3 in Cyclic Sense in the Sleep mode.
For positive edge sensitivity, two samples Low followed by
two samples High are necessary to validate the wake-up
condition.
For negative edge sensitivity, two samples High followed
by two samples Low are necessary to validate the wake-up
condition.
For both edge sensitivity, two samples at a given state
followed by two samples in the opposite state are necessary
to validate the wake-up condition.
Wake-Up Inputs with Cyclic Sense
Connecting the external switches to V3 allows power
saving because V3 can be programmed to be active, passive,
or cyclic (Cyclic Sense). This provides great flexibility
reducing total power consumption while allowing full wake-up
capabilities. Cyclic Sense is available only in the Sleep mode.
The period of the Cyclic Sense can be chosen out of eight
different timings: 32 ms, 64 ms, 128 ms, 256 ms, 512 ms,
1024 ms, 2048 ms, and 8192 ms programmable via SPI in
the CYTCR register. Once activated, V3 remains ON during
400
s. The wake-up inputs states are sampled at 300 s.
Figure 10. V3 Timing
Note: In Sleep mode, the Cyclic Sense feature
‘EXCLUSIVE OR’ the forced Wake-Up is chosen (not both).
Figure 11. Cyclic Sense Timing
Wake-Up Inputs with Permanent Sense
Wake-up detection can also be accomplished in a
permanent way in Normal and Stand-by modes. If the
contacts are connected to V3, wake-ups are only detected if
V3 is ON.
Wake-ups are also detected in a permanent way in the
Sleep mode if the contacts are directly connected to VBAT (if
they are connected to V3, only Cyclic Sense is available in
Sleep mode).
300 s
400 s
V3
Passive
Active
Cyclic Sense Programmable Period
Wake-Up Inputs Sample Point
1
0
1
Actual State (read)
Memory State
INT (Wake-Up Active = 0)
0
80 ms
160 ms
V3
Wake-Up
Switch Status
V(L1)
Read L1
INT
(t0)
(t1)
OPEN
CLOSED
Read
Setup
400
s
300
s
Sample Point (80%)
Cyclic Sense connected to wake-up inputs. Example: with wake-up input L1
sensitivity to Low state and timing = 80 ms
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