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參數(shù)資料
| 型號： | MC28U512HACA |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | MultiMediaCard Specification |
| 中文描述： | 多媒體卡規(guī)格 |
| 文件頁數(shù)： | 42/66頁 |
| 文件大?。?/td> | 1422K |
| 代理商： | MC28U512HACA |
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MultiMediaCard
TM
42
R1b
is identical to R1 with an optional busy signal transmitted on the data line. The card may become
busy after receiving these commands based on its state prior to the command reception
Format R2 (CID, CSD register):
response length 136 bits.
Note: Bit 127 down to bit 1 of CID and CSD are transferred, the reserved bit [0] is replaced by the end
bit
Table 4-11 Format R2(CID, CSD Register) : Response Length 136 bits
0
start bit
0
card
bit5 … bit0
reserved
Bit127 … bit1
CID
or CSD
including internal CRC
1
end bit
register
Format R3 (OCR):
response length 48 bits.
The OCR is sent as a response to the CMD1 to signalize the supported voltage range. The
MultiMediaCard supports the range from 2.7 V to 3.6 V. Respectively the value of all bits of the OCR
field of the MultiMediaCard is set to 0x80FF8000. So the R3 frame of the MultiMediaCard contains the
value 0x3F80FF8000FF if the card is ready and 0x3F00FF8000FF if the card is busy.
Table 4-12 OCR : Response length 50Hz
0
start bit
0
card
bit5 … bit0
reserved
Bit31 … bit0
OCR field
Bit6 … bit0
reserved
1
end bit
4.9.7 Status
The response format R1 contains a 32-bit field with the name card status. This field is intended to
transmit status information which is stored in a local status register of each card to the host. The
following table defines the status register structure. The Type and Clear-Condition fields in the table
are coded as follows:
- Type:
E: Error bit.
S: Status bit.
R: Detected and set for the actual command response.
X: Detected and set during command execution. The host must poll the card by sending status
- Clear Condition:
A : According to the card state.
B: Always related to the previous command. Reception of a valid
command will clear it (with a delay of one command).
C: Clear by read.
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