參數(shù)資料
型號: MC14551BDR2
廠商: ON SEMICONDUCTOR
元件分類: 運(yùn)動控制電子
英文描述: Quad 2-Channel Analog Multiplexer/Demultiplexer
中文描述: QUAD 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16
封裝: SOIC-16
文件頁數(shù): 1/12頁
文件大?。?/td> 115K
代理商: MC14551BDR2
Semiconductor Components Industries, LLC, 2000
August, 2000 – Rev. 4
1
Publication Order Number:
MC14551B/D
MC14551B
Quad 2-Channel Analog
Multiplexer/Demultiplexer
The MC14551B is a digitally–controlled analog switch. This device
implements a 4PDT solid state switch with low ON impedance and
very low OFF Leakage current. Control of analog signals up to the
complete supply voltage range can be achieved.
Triple Diode Protection on All Control Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Analog Voltage Range (V
DD
– V
EE
) = 3.0 to 18 V
Note: V
EE
must be
V
SS
Linearized Transfer Characteristics
Low Noise — 12 nV
Cycle, f
1.0 kHz typical
For Low R
ON
, Use The HC4051, HC4052, or HC4053 High–Speed
CMOS Devices
Switch Function is Break Before Make
(2.)
V
DD
DC Supply Voltage Range
(Referenced to V
EE
, V
SS
V
EE
)
– 0.5 to + 18.0
V
V
in
, V
out
Input or Output Voltage (DC or
Transient) (Referenced to V
SS
for
Control Input & V
EE
for Switch I/O)
– 0.5 to V
DD
+ 0.5
V
I
in
Input Current (DC or Transient),
per Control Pin
±
10
mA
I
sw
Switch Through Current
±
25
mA
P
D
Power Dissipation, per Package
(3.)
500
mW
T
A
Ambient Temperature Range
– 55 to + 125
C
T
stg
Storage Temperature Range
– 65 to + 150
C
T
L
Lead Temperature
(8–Second Soldering)
260
C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
(V
in
or V
out
)
V
DD
for control inputs and V
EE
(V
in
or V
out
)
V
DD
for Switch I/O.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V
SS
, V
EE
or V
DD
). Unused outputs must be left open.
Device
Package
Shipping
ORDERING INFORMATION
MC14551BCP
PDIP–16
2000/Box
MC14551BD
SOIC–16
http://onsemi.com
48/Rail
MC14551BDR2
SOIC–16
2500/Tape & Reel
MARKING
DIAGRAMS
16
1
PDIP–16
P SUFFIX
CASE 648
MC14551BCP
AWLYYWW
SOIC–16
D SUFFIX
CASE 751B
1
16
14551B
AWLYWW
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
SOEIAJ–16
F SUFFIX
CASE 966
1
16
MC14551B
ALYW
MC14551BF
SOEIAJ–16
See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
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