參數(shù)資料
型號(hào): MC10EP90D
廠商: ON SEMICONDUCTOR
英文描述: -3.3V / -5V Triple ECL Input to LVPECL/PECL Output Translator
中文描述: - 3.3 / - 5V的三ECL輸入到的LVPECL / PECL輸出翻譯
文件頁(yè)數(shù): 6/8頁(yè)
文件大小: 68K
代理商: MC10EP90D
MC10EP90, MC100EP90
http://onsemi.com
6
Table 7. AC CHARACTERISTICS
V
EE
= 3.0 V to 5.5 V; V
CC
= 3.0 V to 5.5 V; GND = 0 V (Note 14)
40
°
C
25
°
C
85
°
C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
f
max
Maximum Frequency
(See Figure 2 F
max
/JITTER)
> 3
> 3
> 3
GHz
t
PLH
,
t
PHL
Propagation Delay to
Output Differential
170
240
310
200
260
340
230
300
370
ps
t
SKEW
Duty Cycle Skew (Note 15)
5.0
20
5.0
20
5.0
20
ps
Within Device Skew
Device to Device Skew (Note 15)
Q, Q
80
140
80
140
80
140
t
JITTER
CycletoCycle Jitter
(See Figure 2 F
max
/JITTER)
0.2
< 1
0.2
< 1
0.2
< 1
ps
V
PP
Input Voltage
Swing (Differential Configuration)
150
800
1200
150
800
1200
150
800
1200
mV
t
r
t
f
Output Rise/Fall Times
(20% 80%)
Q, Q
70
120
170
80
130
180
100
150
230
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
14.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 to V
CC
2.0 V.
15.Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays
are measured from the cross point of the inputs to the cross point of the outputs.
100
200
300
400
500
600
700
800
900
4000
5000
Figure 2. F
max
/Jitter
FREQUENCY (MHz)
1
2
3
4
5
6
7
8
(JITTER)
ééééééééééé
9
V
O
(
J
O
éé
éé
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