- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382291 > MC100LVELT23DTRG (ON SEMICONDUCTOR) 3.3 V Dual Differential LVPECL/LVDS to LVTTL Translator PDF資料下載
參數(shù)資料
| 型號： | MC100LVELT23DTRG |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3 V Dual Differential LVPECL/LVDS to LVTTL Translator |
| 中文描述： | DUAL PECL TO TTL TRANSLATOR, TRUE OUTPUT, PDSO8 |
| 封裝： | LEAD FREE, PLASTIC, TSSOP-8 |
| 文件頁數(shù)： | 8/8頁 |
| 文件大小： | 66K |
| 代理商： | MC100LVELT23DTRG |
MC100LVELT23
http://onsemi.com
8
PACKAGE DIMENSIONS
TSSOP8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R02
ISSUE A
DIM
A
B
C
D
F
G
K
MIN
2.90
2.90
0.80
0.05
0.40
0.65 BSC
0.25
MAX
3.10
3.10
1.10
0.15
0.70
MIN
0.114
0.114
0.031
0.002
0.016
0.026 BSC
0.010
MAX
0.122
0.122
0.043
0.006
0.028
INCHES
MILLIMETERS
L
M
4.90 BSC
0
0.193 BSC
0
6
6
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE W.
SEATING
PLANE
PIN 1
1
4
8
5
DETAIL E
B
C
D
A
G
DETAIL E
F
M
L
2X
L/2
U
S
U
0.15 (0.006) T
S
U
0.15 (0.006) T
S
U
M
0.10 (0.004)
V
S
T
0.10 (0.004)
T
V
W
0.25 (0.010)
8x REF
0.40
0.016
ON Semiconductor
and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support
: 8002829855 Toll Free
USA/Canada
Japan
: ON Semiconductor, Japan Customer Focus Center
291 Kamimeguro, Meguroku, Tokyo, Japan 1530051
Phone
: 81357733850
MC100LVELT23/D
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
LITERATURE FULFILLMENT
:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 850821312 USA
Phone
: 4808297710 or 8003443860 Toll Free USA/Canada
Fax
: 4808297709 or 8003443867
Toll Free USA/Canada
Email
: orderlit@onsemi.com
ON Semiconductor Website
: http://onsemi.com
Order Literature
: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC10105FNR2 | Triple 2-3-2-Input OR/NOR Gate |
| MC10105LR2 | Triple 2-3-2-Input OR/NOR Gate |
| MC10105PR2 | Triple 2-3-2-Input OR/NOR Gate |
| MC10115FNR2 | Quad Line Receiver |
| MC10115LR2 | Quad Line Receiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC100LVELT23MNRG | 功能描述:轉(zhuǎn)換 - 電壓電平 BBG ECL TRNSLTR DIFF RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
| MC100LVELT23TG | 制造商:ON Semiconductor 功能描述: |
| MC100LVEP05DG | 功能描述:邏輯門 LV 2INPUT DIFF AND/NAND RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| MC100LVEP05DR2G | 功能描述:邏輯門 LV 2INPUT DIFF AND/NAND RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| MC100LVEP05DTG | 功能描述:邏輯門 2 INPT DIFFERENTIAL 2.5V 3.3V EGL RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。