參數(shù)資料
型號: MB9AF312LPMC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP64
封裝: 0.65 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù): 5/114頁
文件大?。?/td> 1357K
代理商: MB9AF312LPMC
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
102
The following code examples show how to do an atomic write of the TCNT1 register contents. Writing any of the OCR1A/B
or ICR1 registers can be done by using the same principle.
The assembly code example requires that the r17:r16 register pair contains the value to be written to TCNT1.
16.3.1 Reusing the Temporary High Byte Register
If writing to more than one 16-bit register where the high byte is the same for all registers written, then the high byte only
needs to be written once. However, note that the same rule of atomic operation described previously also applies in this
case.
16.4
Timer/Counter Clock Sources
The Timer/Counter can be clocked by an internal or an external clock source. The clock source is selected by the clock
select logic which is controlled by the clock select (CS12:0) bits located in the Timer/Counter control register B (TCCR1B).
Assembly Code Example(1)
TIM16_WriteTCNT
1:
; Save global interrupt flag
in
r18,SREG
; Disable interrupts
cli
; Set TCNT
1 to r17:r16
out
TCNT
1H,r17
out
TCNT
1L,r16
; Restore global interrupt flag
out
SREG,r18
ret
C Code Example(1)
void
TIM16_WriteTCNT
1( unsigned int i )
{
unsigned char
sreg;
unsigned int
i;
/* Save global interrupt flag */
sreg = SREG;
/* Disable interrupts */
_CLI();
/* Set TCNT
1 to i */
TCNT
1 = i;
/* Restore global interrupt flag */
SREG = sreg;
}
Note:
1.
For I/O registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions
must be replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS” combined
with “SBRS”, “SBRC”, “SBR”, and “CBR”.
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