參數(shù)資料
型號： MB91101APF-G-JNE1
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 14 X 20 MM, 3.35 MM HEIGHT, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù)： 13/100頁
文件大?。?/td> 2083K
代理商： MB91101APF-G-JNE1
MB91101 Series
2
DS07-16301-6E
Internal multiplier/supported at instruction level
Signed 32-bit multiplication: 5 cycles
Signed 16-bit multiplication: 3 cycles
Interrupt (push PC and PS): 6 cycles, 16 priority levels
External bus interface
Clock doubler: Internal 50 MHz, external bus 25 MHz operation
25-bit address bus (32 Mbytes memory space)
8/16-bit data bus
Basic external bus cycle: 2 clock cycles
Chip select outputs for setting down to a minimum memory block size of 64 Kbytes: 6
Interface supported for various memory technologies
DRAM interface (area 4 and 5)
Automatic wait cycle insertion: Flexible setting, from 0 to 7 for each area
Unused data/address pins can be configured as input/output ports.
Little endian mode supported (Select 1 area from area 1 to 5)
DRAM interface
2 banks independent control (area 4 and 5)
Normal mode (double CAS DRAM)/high-speed page mode (single CAS DRAM)/Hyper DRAM
Basic bus cycle: Normally 5 cycles, 2-cycle access possible in high-speed page mode
Programmable waveform: Automatic 1-cycle wait insertion to RAS and CAS cycles
DRAM refresh
CBR refresh (interval time configurable by 6-bit timer)
Self-refresh mode
Supports 8/9/10/12-bit column address width
2CAS/1WE, 2WE/1CAS selective
Cache memory
1-Kbyte instruction cache memory
32 block/way, 4 entry(4 word)/block
2 way set associative
Lock function: For specific program code to be resident in cashe memory
DMA controller (DMAC)
8 channels
Transfer incident/external pins/internal resource interrupt requests
Transfer sequence: Step transfer/block transfer/burst transfer/continuous transfer
Transfer data length: 8 bits/16 bits/32 bits selective
NMI/interrupt request enables temporary stop operation.
UART
3 independent channels
Full-duplex double buffer
Data length: 7 bits to 9 bits (non-parity), 6 bits to 8 bits (parity)
Asynchronous (start-stop system), CLK-synchronized communication selective
Multi-processor mode
Internal 16-bit timer (U-TIMER) operating as a proprietary baud rate generator: Generates any given baud
rate
External clock can be used as a transfer clock.
Error detection: Parity, frame, overrun
(Continued)
相關(guān)PDF資料
PDF描述
MB91106PFV-XXX 32-BIT, MROM, 50 MHz, RISC MICROCONTROLLER, PQFP100
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MB91107APFV RISC MICROCONTROLLER, PQFP120
MB911110PMT2 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP144
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB91101APFR-G-JNE1 制造商:FUJITSU 功能描述:
MB91101APFV 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller
MB91106 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller
MB91106PF 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller
MB91106PFV 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller
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