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參數資料
| 型號： | MB89PV950CF |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 5 MHz, MICROCONTROLLER, CQFP64 |
| 封裝： | 0.80 MM PITCH, PIGGY BACK, MQFP-64 |
| 文件頁數： | 106/110頁 |
| 文件大?。?/td> | 619K |
| 代理商： | MB89PV950CF |
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OPERATION
3– 9
3.5
Pin States For Sleep, Stop, and Reset
The state of each pin of the MB89950 series of microcontrollers at sleep, stop and reset is as follows:
(1) Sleep
The pin state immediately before the sleep state is held.
(2) Stop
The pin state immediately before the stop state is held when the stop
mode is started and bit 5 of the standby-control register (STBC) is set to
0; the impedance of the output and input/output pins goes High when the
bit is set to 1.
(3) Reset
The impedance of all I/O and peripheral pins (excluding pins for pull-up
option) goes High.
Table 3–3 Pin State of MB89950
Pin name
Normal
Sleep
Stop SPL=0
Stop SPL=1
Reset
COM0 to COM3
COM outputs
Low level outputs
Low level output
SEG00 to SEG19
Segment outputs
Low level outputs
Low level output
P00/SEG20 to
P07/SEG27
P10/SEG28 to
P17/SEG35
P20/SEG36 to
P25/SEG41
Port I/O
/Peripheral output
Port I/O
/Peripheral output
Port I/O
/Peripheral
output = Low
High impedance*1
/Peripheral
output = Low
High impedance*1
X0
Input for oscillation
High impedance*1
High impedance*1 Input for oscillation
X1
Output for oscillation Output for oscillation
High output
Output for
oscillation
MODA
Mode input
RST
Reset input
Reset input*2
P30,P31
Port I/O
High impedance*1
High impedance
P32/V1, P33/V2
Port/LCD bias
High impedance*4
/LCD bias
High impedance*5
V3
Input
P40 to P46/INT0
Port/Peripheral I/O
High
impedance*1,*3
High impedance*1
*1 The internal input level is fixed to prevent leakage due to open input . Pins for which the pull-up
option is selected, enter the pull-up state.
*2 The reset pin may serve as the output depending on the option setting.
*3 For P42 and P46, when edge detection for the external interrupt is selected, only the external
interrupt can be input even in the stop mode (SPL = 1).
*4 Whether the pins behave as I/O port or LCD bias depends on the PSEL bit of LCDR (see page 2-60).
*5 These pins are selected as LCD bias after reset. To turn P32 and P33 to ports after reset, set
PSEL bit of LCDR to 1 afterwards.
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