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參數(shù)資料
| 型號： | MAX9850 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Stereo Audio DAC with DirectDrive Headphone Amplifier |
| 中文描述： | 立體聲音頻DAC，帶有DirectDrive®耳機放大器 |
| 文件頁數(shù)： | 27/36頁 |
| 文件大?。?/td> | 956K |
| 代理商： | MAX9850 |
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Slew-Rate Control (SR(1:0))
00 = Headphone volume slews from code 0x00 to 0x28
in 63μs. Not recommended when ZDEN = 1.
01 = Headphone volume slews from code 0x00 to 0x28
in 125ms.
10 = Headphone volume slews from code 0x00 to 0x28
in 63ms.
11 = Headphone volume slews from code 0x00 to 0x28
in 42ms.
Program SR(1:0) to set the rate that the MAX9850 uses to
slew between two volume settings. The slew-rate control
also controls the amount of time the headphone outputs
take to mute or shut down after the command is given.
Charge-Pump Clock Divider (CP(4:0))
CP(4:0) controls the charge-pump clock divider. The
charge-pump clock frequency (f
CPCLK
) is derived from
either ICLK or from the internal oscillator.
Program CP(4:0) = 0x00 to enable the 667kHz internal
oscillator. This allows the headphone amplifiers and
line outputs to operate when the DAC is disabled.
Programming CP(4:0) to any value other than 0x00 dis-
ables the internal oscillator and derives the charge-
pump clock from ICLK. Program CP(4:0) with a value
that creates a 667kHz
±
20% charge-pump clock from
ICLK by the following equation:
f
CP
NCP
×
2
( : )
where:
f
MCLK
= MCLK frequency.
N
CP(4:0)
= decimal value of CP(4:0). N
CP(4:0)
must be
greater than 1 when deriving the charge-pump clock
from I
CLK
.
f
CP
= charge-pump clock frequency. Program f
CP
=
667kHz
±
20% for proper operation.
SF = MCLK scale factor. SF is the decimal value of
IC(1:0) + 1.
LRCLK MSB and LRCLK LSB Registers
Table 19. LRCLK MSB (0x8) and LRCLK
LSB (0x9) Read/Write, Bit Descriptions
Integer Mode (INT)
1 = Configure the MAX9850 to integer mode.
0 = Configure the MAX9850 to noninteger mode.
Integer mode operation requires that ICLK is an integer
multiple of 16 times the sample rate (f
LRCLK
). See the
DAC Operating Modes
section. When in integer mode,
f
LRCLK
= f
ICLK
/ (16 x LSB(7:0)).
LRCLK MSB Divider (MSB(14:8))
MSB(14:8) and LSB(7:0) are used to determine f
LRCLK
when in noninteger mode only (see the
DAC Operating
Modes
section). For noninteger mode:
LRCLK LSB Divider (LSB(7:0))
LSB(7:0) combined with MSB(14:8) sets the LRCLK
divider when the MAX9850 is configured in noninteger
mode. Only LSB(7:0) is used to determine f
LRCLK
when
the MAX9850 is configured in integer mode. See the
DAC Operating Modes
section.
Digital Audio Register
Table 20. Digital Audio (0xA) Read/Write,
Bit Descriptions
Master Mode (MAS)
1 = Configure the MAX9850 to master mode.
0 = Configure the MAX9850 to slave mode.
Set MAS = 1 to configure the MAX9850 to master mode.
The LRCLK and BCLK are generated by the MAX9850
when in master mode. Set MAS = 0 to configure the
MAX9850 as a digital audio slave that accepts LRCLK
and BCLK from an external digital audio source.
LRCLK Invert (INV)
1 = Left audio data is clocked in when LRCLK is high
and right data is clocked in when LRCLK is low.
0 = Left audio data is clocked in when LRCLK is low
and right data is clocked in when LRCLK is high.
Set INV = 0 to conform to the I
2
S standard.
Bit Clock Invert (BCINV)
1 = Digital data at SDIN latches in on the falling edge of
BCLK.
0 = Digital data at SDIN latches in on the rising edge of
BCLK.
Set BCINV = 0 to conform to the I
2
S standard.
N
f
f
MSB LSB
LRCLK
ICLK
,
×
=
2
22
f
SF
MCLK
40
=
×
M
Stereo Audio DAC with DirectDrive
Headphone Amplifier
______________________________________________________________________________________
27
B7
INT
B6
B5
B4
B3
B2
B1
B0
MSB(14:8)
LSB(7:0)
B7
MAS
B6
INV
B5
B4
LSF
B3
DLY
B2
RTJ
B1
B0
BCINV
WS(1:0)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX98500EVKIT+ | 功能描述:音頻 IC 開發(fā)工具 MAX98500 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| MAX98500EWE+ | 制造商:Maxim Integrated Products 功能描述:BOOSTED CLASS D AMPLIFIER WITH ALC - Rail/Tube |
| MAX98500EWE+T | 功能描述:音頻放大器 2.2W Mono Class D Amplifier RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| MAX98502EVKIT# | 功能描述:放大器 IC 開發(fā)工具 MAX98502 Eval Kit RoHS:否 制造商:International Rectifier 產(chǎn)品:Demonstration Boards 類型:Power Amplifiers 工具用于評估:IR4302 工作電源電壓:13 V to 23 V |
| MAX98502EWE+ | 功能描述:音頻放大器 Boosted Class D Amplifier RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
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