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參數(shù)資料
| 型號(hào)： | MAX9158 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Quad Bus LVDS Transceiver in 44 QFN |
| 中文描述： | 四路、總線式LVDS收發(fā)器，44 QFN封裝 |
| 文件頁(yè)數(shù)： | 10/15頁(yè) |
| 文件大?。?/td> | 358K |
| 代理商： | MAX9158 |
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M
Traces, Cables, and Connectors
The characteristics of input and output connections
affect the performance of the MAX9158. Use controlled-
impedance traces, cables, and connectors with
matched characteristic impedance.
Ensure that noise couples as common mode by run-
ning the traces of a differential pair close together.
Reduce within-pair skew by matching the electrical
length of the traces of a differential pair. Excessive
skew can result in a degradation of magnetic field can-
cellation. Maintain the distance between traces of a dif-
ferential pair to avoid discontinuities in differential
impedance. Minimize the number of vias to further pre-
vent impedance discontinuities.
Avoid the use of unbalanced cables, such as ribbon
cable. Balanced cables, such as twisted pair, offer
superior signal quality and tend to generate less EMI
due to canceling effects. Balanced cables tend to pick
up noise as common mode, which is rejected by the
receiver.
Board Layout
A four-layer PC board that provides separate power,
ground, input, and output signals is recommended.
Keep the LVTTL/LVCMOS and BLVDS signals separat-
ed to prevent coupling.
Quad Bus LVDS Transceiver in 44 QFN
10
______________________________________________________________________________________
INPUTS
OUTPUTS
RO_
L
H
RE_
L
L
V
ID
= (V
DO_+
/R
IN_+
) - (V
DO_-
/R
IN_-
)
V
ID
< -100mV
V
ID
> 100mV
Fail-safe operation guaranteed when
DO_+/RIN_+ and DO_-/RIN_- are
open, undriven and shorted, or
undriven and parallel terminated
X
L
H
H
Z
Table 3. Receiver Mode
PIN
INTERNAL RESISTOR
DE12
DE34
RE12
RE34
DIN_
Pullup to V
CC
Pullup to V
CC
Pullup to V
CC
Pullup to V
CC
None (floating)
Table 4. Input Internal Pullup/Pulldown
Resistors
R
L
C
L
DO_+/RIN_+
DO_-/RIN_-
C
L
50
DIN_
GENERATOR
Figure 3. Driver Propagation Delay and Transition Time Test Circuit
V
O
OD
V
CC
GND
DIN_
R
L
/2
R
L
/2
V
OS
DO_-/RIN_-
D0_+/RIN_+
Figure 2. Driver V
OD
and V
OS
Test Circuit
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| MAX9173ETE | Quad LVDS Line Receiver with Flow-Through Pinout and “In-Path” Fail-Safe |
| MAX9173EUE | Quad LVDS Line Receiver with Flow-Through Pinout and “In-Path” Fail-Safe |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9158EGM | 制造商:Maxim Integrated Products 功能描述:QUAD BUS LVDS TRANSCEIVER IN 44-PIN QFN - Rail/Tube 制造商:Rochester Electronics LLC 功能描述: |
| MAX9158EGM-T | 制造商:Maxim Integrated Products 功能描述:QUAD BUS LVDS TRANSCEIVER IN 44-PIN QFN - Tape and Reel |
| MAX9159 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Dual LVDS Line Receiver |
| MAX9159ESA | 制造商:Maxim Integrated Products 功能描述:DUAL LVDS LINE RECEIVER - Rail/Tube |
| MAX915C/D | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Analog Comparator |
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