參數(shù)資料
型號: MAX8588
廠商: Maxim Integrated Products, Inc.
英文描述: 8-Line To 1-Line Data Selectors/Multiplexers 20-LCCC -55 to 125
中文描述: 高效率、低IQ PMIC,帶有動態(tài)內(nèi)核,用于PDA和智能電話
文件頁數(shù): 14/31頁
文件大小: 572K
代理商: MAX8588
M
High-Efficiency, Low-I
Q
PMIC with
Dynamic Core for PDAs and Smartphones
14
______________________________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1
LBI
Dual-Mode, Low-Battery Input. Connect to IN to set the low-battery threshold to 3.6V (no resistors needed).
Connect LBI to a resistor-divider for an adjustable LBI threshold. When IN is below the set threshold,
LBO
output switches low.
LBO
is deactivated and forced low when IN is below the dead-battery (DBI) threshold
and when all REGs are disabled.
2
CC1
REG1 Compensation Node. Connect a series resistor and capacitor from CC1 to GND to compensate the
regulation loop. See the
Compensation and Stability
section
.
3
FB1
REG1 Feedback Input. Connect FB1 to GND to set V1 to 3.3V. Connect FB1 to external feedback resistors
for other output voltages.
4
BKBT
Input Connection for Backup Battery. This input can also accept the output of an external boost converter.
5
V7
Also known as VCC_BATT. V7 is always active if main or backup power is present. It is the first regulator that
powers up. V7 has two states:
1) V7 tracks V1 if ON1 is high and V1 is in regulation.
2) V7 tracks V
BKBT
when ON1 is low or V1 is out of regulation.
6
V1
REG1 Voltage-Sense Input. Connect directly to the REG1 output voltage. The output voltage is set by FB1 to
either 3.3V or adjustable with resistors.
7
SLPIN
Inp ut to V 1 and V 2 S eep Reg ul ator s. The i np ut to the stand b y r eg ul ator s at V 1 and V 2. C onnect S LP N to IN
8
V2
REG2 Voltage-Sense Input. Connect directly to the REG2 output voltage. The output voltage is set by FB2 to
either 3.3V/2.5V or adjustable with resistors.
9
FB2
REG2 Feedback Input. Connect to GND to set V2 to 2.5V on all devices. Connect FB2 to IN to set V2 to 3.3V.
Connect FB2 to external feedback resistors for other voltages.
10
CC2
REG2 Compensation Node. Connect a series resistor and capacitor from CC2 to GND to compensate the
regulation loop. See the
Compensation and Stability
section.
11
POK
Power-OK Output. Open-drain output that is low when any of the V1–V6 outputs are below their regulation
threshold. When all activated outputs are in regulation, POK is high impedance. POK maintains a valid low
output with V7 as low as 1V. POK does not flag an out-of-regulation condition while REG3 is transitioning
between voltages set by serial programming. POK also does not flag for any REG channel that has been
turned off; however, if
all
REG channels are off (V1–V6), then POK is forced low. If IN < UVLO, then POK is
low. POK is expected to connect to nVCC_FAULT.
12
SCL
Serial Clock Input
13
SDA
Serial Data Input. Serial data programs the REG3 (core) and REG6 (VCC_USIM) voltage. REG3 and REG6
can be programmed even when off, but at least one of the ON_ pins must be logic-high to activate the serial
interface. On power-up, REG3 defaults to 1.3V and REG6 defaults to 0V.
14
PWM3
Force V3 to PWM at All Loads. Connect PWM3 to GND for normal operation (skip mode at light loads). Drive
or connect high for forced-PWM operation at all loads for V3 only.
15
LBO
Low-Battery Output. Open-drain output that goes low when IN is below the threshold set by LBI.
Dual Mode is a trademark of Maxim Integrated Products, Inc.
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