Connecting an ordinary signal diode in series with R3,
as shown in Figure 4b, causes the lower trip point (V
L
)
to coincide with the trip point without hysteresis (V
TRIP
),
so the entire hysteresis window occurs above V
TRIP
.
This method provides additional noise margin without
compromising the accuracy of the power-fail threshold
when the monitored voltage is falling. It is useful for
accurately detecting when a voltage falls past a
threshold.
The current through R1 and R2 should be at least 1μA to
ensure that the 25nA (max over extended temperature
range) PFI input current does not shift the trip point. R3
so it does not load down the
should be larger than 10k
Monitoring an Additional Power S upply
These μP supervisors can monitor either positive or
negative supplies using a resistor voltage divider to
μP (Figure 5). Connecting–——O to–M—–on the MAX704
and MAX806 causes reset to assert when the
monitored supply goes out of tolerance. Reset remains
after–——O goes high.
Interfac ing to μPs
with Bidirec tional Reset Pins
μPs with bidirectional reset pins, such as the Motorola
68HC11 series, can contend with the MAX690_/
example, the–————– output is driven high and the μP
wants to pull it low, indeterminate logic levels may
resistor
result. To correct this, connect a 4.7k
Figure 6. Buffer the–————– output to other system
components.
Negative-Going V
T ransients
While issuing resets to the μP during power-up, power-
down, and brownout conditions, these supervisors are
relatively immune to short-duration negative-going V
transients (glitches). It is usually undesirable to reset
the μP when V
CC
experiences only small glitches.
Figure 7 shows maximum transient duration vs. reset-
comparator overdrive, for which reset pulses are
not
generated. The graph was produced using negative-
going V
pulses, starting at 3.3V and ending below
the reset threshold by the magnitude indicated (reset
comparator overdrive). The graph shows the maximum
pulse width a negative-going V
transient may
typically have without causing a reset pulse to be
issued. As the amplitude of the transient increases
(i.e., goes farther below the reset threshold), the
maximum allowable pulse width decreases. Typically,
a V
transient that goes 100mV below the reset
threshold and lasts for 40μs or less will not cause a
reset pulse to be issued.
A 100nF bypass capacitor mounted close to the V
CC
pin provides additional transient immunity.
M
3.0V /3.3V Mic roproc essor S upervisory Circ uits
_______________________________________________________________________________________
9
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
V
OUT
TOSTATIC
RAM
VBATT
V
CC
GND
1N4148
RESET
(RESET)
( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY
TO
μ
P
0.47F
3.0V OR 3.3V
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
V
OUT
TOSTATIC
RAM
VBATT
V
CC
GND
1N4148
RESET
(RESET)
( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY
TO
μ
P
0.47F
3.0V OR
3.3V
+5V
b
a
Figure 3. Using a SuperCap as a Backup Power Source