參數(shù)資料
型號: MAX6403BS__-T
廠商: Maxim Integrated Products, Inc.
英文描述: レP Supervisory Circuits in 4-Bump (2 x 2) Chip-Scale Package
中文描述: レP監(jiān)控電路,4焊球(2 × 2)芯片級封裝
文件頁數(shù): 5/9頁
文件大?。?/td> 137K
代理商: MAX6403BS__-T
Detailed Description
Reset Output
A microprocessor
s (μP
s) reset input starts the μP in a
known state. These μP supervisory circuits assert reset
to prevent code execution errors during power-up,
power-down, or brownout conditions.
RESET
is guaranteed to be a logic low for V
CC
down to
1V. Once V
CC
exceeds the reset threshold, an internal
timer keeps
RESET
low for the reset timeout period;
after this interval,
RESET
goes high.
If a brownout condition occurs (V
CC
dips below the
reset threshold),
RESET
goes low. Any time V
CC
goes
below the reset threshold, the internal timer resets to
zero, and
RESET
goes low. The internal timer starts
after V
CC
returns above the reset threshold, and
RESET
remains low for the reset timeout period.
The manual reset input (
MR
) can also initiate a reset,
see the
Manual Reset Input
section. The MAX6401/
MAX6404 have active-high RESET outputs that are the
inverse of the MAX6400/MAX6402/MAX6403/MAX6405
outputs (Figure 1).
Manual Reset Input
Many μP-based products require manual reset capabil-
ity, allowing the operator, a test technician, or external
logic circuit to initiate a reset. A logic low on
MR
asserts
reset. Reset remains asserted while
MR
is low, and for
the reset active timeout period (t
RP
) after
MR
returns
high. This input has an internal 50k
pullup resistor, so
it can be left open if it is not used.
MR
can be driven
with TTL or CMOS logic levels, or with open-drain/col-
lector outputs. Connect a normally open momentary
switch from
MR
to GND to create a manual reset func-
tion; external debouncing circuitry is not required. If
MR
is driven from long cables or if the device is used in a
noisy environment, connect a 0.1μF capacitor from
MR
to ground to provide additional noise immunity (see
Figure 1).
Applications Information
Interfacing to μP with Bidirectional
Reset Pins
Since the
RESET
output on the MAX6402/MAX6405 is
open-drain, these devices interface easily with (μPs)
that have bidirectional reset pins. Connecting the μP
supervisor
s
RESET
output directly to the microcon-
troller
s (μC
s)
RESET
pin with a single pullup resistor
allows either device to assert reset (Figure 2).
Negative-Going VCC Transients
These devices are relatively immune to short-duration,
negative-going V
CC
transients (glitches).
The
Typical Operating Characteristics
show the
Maximum Transient Duration vs. Reset Threshold
Overdrive graph, for which reset pulses are not gener-
M
μP Supervisory Circuits in 4-Bump (2
2)
Chip-Scale Package
_______________________________________________________________________________________
5
PIN
MAX6400/MAX6402
MAX6403/MAX6405
MAX6401/MAX6404
NAME
FUNCTION
A1
A1
GND
Ground
B1
RESET
Active-Low Reset Output, (Open-Drain or Push-Pull).
RESET
is asserted low when the V
CC
input is below the selected
reset threshold.
RESET
remains low for the reset timeout
period after V
CC
exceeds the device reset threshold. Open-
drain outputs require an external pullup resistor.
B1
RESET
Active-High Reset Output. RESET remains high while V
CC
is
below the reset threshold and for at least 100ms after V
CC
rises above the reset threshold.
B2
B2
MR
Active-Low Manual Reset. Internal 50k
pullup to V
CC
. Pull
low to assert a reset. Reset remains asserted as long as
MR
is low and for the reset timeout period after
MR
goes high.
Leave unconnected or connect to V
CC
if unused.
A2
A2
V
CC
Supply Voltage and Input for the Reset Threshold Monitor
Pin Description
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