參數(shù)資料
型號(hào): MAX5965AEAX+
廠商: Maxim Integrated
文件頁(yè)數(shù): 37/54頁(yè)
文件大小: 1334K
描述: IC PSE CTRLR FOR POE 36SSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 30
類型: 以太網(wǎng)供電控制器(PoE)
應(yīng)用: IP 電話,LAN 網(wǎng)絡(luò)供電,網(wǎng)絡(luò)路由器和交換機(jī)
內(nèi)部開關(guān):
電源電壓: 2.4 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 36-BSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 36-SSOP
包裝: 管件
High-Power, Quad, Monolithic, PSE Controllers
for Power over Ethernet
______________________________________________________________________________________   37
Setting CL_DISC to 1 (Table 21) enables port over class
current protection, where the MAX5965A/MAX5965B
scales down the overcurrent limit (V
FLT_LIM
) according
to the port classification status. This feature provides
protection to the system against PDs that violate their
maximum class current allowance.
The MAX5965 is programmed to switch to a high-power
configuration and HP_TIME is low, the higher current set-
ting is enabled only after a successful startup so that the
PD powers up as a normal 15W device. If HP_TIME is set
together with EN_HP_ALL, the higher current setting will
be active before startup. For Classes 4, 5, and 6, the
corresponding enable bit in register R15h must be set
together with EN_HP_ALL. In any other cases, the cur-
rent level defaults to Class 0.
CL_DISC, together with EN_HP_CL_ (R15h[6:4]),
EN_HP_ALL (R15h[7]), and ENx_CL6 (R1Ch[7:4]) are
used to program the high-power mode. See Table 3 for
details.
Setting OUT_ISO high (Table 21), forces DET_ to a
high-impedance state.
A reset sets R17h = 0xC0.
Table 21. Miscellaneous Configurations 1 Register
ADDRESS = 17h
SYMBOL
BIT
R/W
DESCRIPTION
INT_EN
7
R/W
A logic-high enables INT functionality
RSTR_EN
6
R/W
A logic-high enables the autorestart protection time off (as set by the RSTR[1:0] bits)
Reserved
5

Reserved
Reserved
4

Reserved
POFF_CL
3
R
A logic-high prevents power-up after a classification failure (I > 50mA, valid only in AUTO
mode)
CL_DISC
2
R/W
A logic-high enables reduced current-limit voltage threshold (V
FLT_LIM
) according to port
classification result
OUT_ISO
1
R/W
Forces DET_ to high impedance. Does not interfere with other circuit operation.
HP_TIME
0
R/W
Enables high power after startup.
Table 22. Power-Enable Pushbuttons Register
ADDRESS = 19h
SYMBOL
BIT
R/W
DESCRIPTION
PWR_OFF4
7
W
A logic-high powers off port 4
PWR_OFF3
6
W
A logic-high powers off port 3
PWR_OFF2
5
W
A logic-high powers off port 2
PWR_OFF1
4
W
A logic-high powers off port 1
PWR_ON4
3
W
A logic-high powers on port 4
PWR_ON3
2
W
A logic-high powers on port 3
PWR_ON2
1
W
A logic-high powers on port 2
PWR_ON1
0
W
A logic-high powers on port 1
Power-enable pushbutton for semi and manual modes
is found in Table 22. Setting PWR_ON_ to 1 turns on
power to the corresponding port. Setting PWR_OFF_ to
1 turns off power to the port. PWR_ON_ is ignored when
the port is already powered and during shutdown.
PWR_OFF_ is ignored when the port is already off and
during shutdown. After execution, the bits reset to 0.
During detection or classification, if PWR_ON_ goes
high, the MAX5965A/MAX5965B gracefully terminate
the current operation and turn on power to the port. The
MAX5965A/MAX5965B ignore the PWR_ON_ in auto
mode. A reset sets R19h = 00h.
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