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參數(shù)資料
| 型號： | MAX5954LETX+T |
| 廠商： | Maxim Integrated |
| 文件頁數(shù)： | 3/22頁 |
| 文件大小： | 1027K |
| 描述： | IC PCI EXP/HOT-PLUG CTRLR 36TQFN |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 類型： | 熱交換控制器 |
| 應用： | 通用型，PCI Express? |
| 內(nèi)部開關： | 無 |
| 電源電壓： | 3.3V，12V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 36-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 36-TQFN 裸露焊盤（6x6） |
| 包裝： | 帶卷 (TR) |
Single PCI Express, Hot-Plug
Controller
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(V
12VIN
= V
12S-
= V
12S+
= 12V, V
3.3S+
= V
3.3S-
= V
3.3VAUXIN
= V
ON
= V
AUXON
= V
FON
= 3.3V, PWRGD = FAULT = PORADJ = TIM =
OUTPUT = 12G = 3.3G = OPEN, INPUT = PRES-DET = PGND = GND, T
A
= -40癈 to +85癈, unless otherwise noted. Typical values
are at T
A
= +25癈.) (Note 1)
PARAMETER
YMB L
CONDITIONS
MIN
TYP
MAX
NIT
.3V CONTROL
.3V Current-Limit Threshold
V
3.3S+
- V
3.3S-
)
V
3.3ILIM
17
20
23
mV
.3G Gate Charge Current
I
3.3G CHG
V
3.3G
= GND
4
5
6
礎
ON = GND, V
3.3G
= 2V
50
150
250
礎
3.3G Gate Discharge Current
I
3.3G_DIS
O utp ut shor
t- ci r
cui t cond i
ti on, str
ong
g ate p ul l d ow n
to r
eg ul ati
on, V
3 .3 S +
-
V
3 .3 S
e 1V , V
3 .3 G
= 5V
100
150
220
mA
.3G Gate High Voltage
V
3.3G
- V
3.3S+
)
V
3.3G_H
Sourcing 1礎
4.5
5.5
6.8
V
.3G Threshold Voltage For
WRGD Assertion
V
PGTH3.3
Referred to V
3.3VAUXIN
, I
3.3G
= 1礎 (Note 2)
-3.0
+4
+4.5
V
.3S- Input Bias Current
1
礎
.3S+ Input Bias Current
20
60
礎
.3V AUXILIARY SUPPLY
.3VAUXIN Supply Voltage
Range
V
3.3VAUXIN
3.0
3.3
3.6
V
3.3VAUXIN rising
2.52
2.65
2.78
V
.3VAUXIN Undervoltage
Lockout
V
3 .3 V A U X U V L O
Hysteresis
30
mV
.3VAUXIN Supply Current
V
3.3VAUXIN
= 3.6V
1.5
3
mA
.3VAUXIN to 3.3VAUXO
Maximum Dropout
I
3.3VAUXO
= 375mA
225
mV
.3VAUXO Current-Limit
hreshold
3.3VAUXO shorted to GND
376
470
564
mA
.3VAUXO Threshold For
WRGD Assertion
V
3.3VAUXIN
- V
3.3VAUXO
)
V
PGTH3.3AUX
(Note 3)
400
mV
LOGIC SIGNALS
Rising edge
1.0
2.0
V
Input-Logic Threshold
ON, FON, AUXON,
RES-DET, INPUT)
Hysteresis
25
mV
Input Bias Current
ON, AUXON, INPUT)
1
礎
ON, PRES-DET Internal
Pullup
25
50
75
k&
N, AUXON High-to-Low
Deglitch Time
4
祍
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