參數(shù)資料
型號(hào): MAX5939EESA+
廠商: Maxim Integrated
文件頁(yè)數(shù): 3/18頁(yè)
文件大?。?/td> 386K
描述: IC HOT-SWAP CTRLR -48V 8-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 100
類型: 熱交換控制器
應(yīng)用: 通用
內(nèi)部開(kāi)關(guān): 無(wú)
電源電壓: -20 V ~ -80 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
-48V Hot-Swap Controllers with External
R
SENSE
and High Gate Pulldown Current
_______________________________________________________________________________________   3
ELECTRICAL CHARACTERISTICS (continued)
(V
EE
= 0V, V
DD
= 48V, T
A
= -40癈 to +85癈, unless otherwise noted. Typical values are at T
A
= +25癈, unless otherwise noted.) (Notes 1, 4)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
PWRGD OUTPUT SIGNAL (REFERENCED TO DRAIN)
DRAIN Input Current
I
DRAIN
V
DRAIN
 = 48V
10
80
250
礎(chǔ)
DRAIN Threshold for PWRGD
V
DL
V
DRAIN
 - V
EE
 threshold for power-good
condition, DRAIN decreasing
1.1
1.7
2.0
V
GATE High Threshold
V
GH
V
GATE
 - V
GATE
, decreasing
1.0
1.6
2.0
V
V 
PWRGD
 = 80V, V
DRAIN
 = 48V
10
PWRGD, PWRGD Output
Leakage
I
OH
V
PWRGD
 = 80V, V
DRAIN
 = 0V
10
礎(chǔ)
PWRGD Low Voltage
(V 
PWRGD
 - V
EE
)
V
OL
V
DRAIN
 - V
EE
< V
DL
, I
SINK
 = 5mA
(A, E versions)
0.11
0.4
V
PWRGD Low Voltage
(V
PWRGD
 - V
DRAIN
)
V
OL
V
DRAIN
 = 5V, I
SINK
 = 5mA (B, F versions)
0.11
0.4
V
OVERTEMPERATURE PROTECTION
Overtemperature Threshold
T
OT TH
Junction temperature, temperature rising
135
Overtemperature Hysteresis
T
HYS
See Thermal Shutdown section
20
AC PARAMETERS
OV High to GATE Low
t
PHLOV
Figures 1a, 2
0.5
UV Low to GATE Low
t
PHLUV
Figures 1a, 3
0.4
OV Low to GATE High
t
PLHOV
Figures 1a, 2
3.3
UV High to GATE High
t
PLHUV
Figures 1a, 3
8.4
ms
SENSE High to GATE Low
t
PHLSENSE
Figures 1a, 4a
1
A, B versions
0.35
0.5
0.65
Current Limit to GATE Low
t
PHLCL
Time from continuous
current limit to GATE
shutdown (see Overcurrent
Fault Integrator section),
Figures 1b, 4b
E, F versions
1.4
2.0
2.6
ms
Figures 1a, 5a; A and E versions
8.2
DRAIN Low to PWRGD Low
DRAIN Low to (PWRGD - DRAIN)
High
t
PHLDL
Figures 1a, 5a; B and F versions
8.2
ms
Figures 1a, 5b; A and E versions
8.2
GATE High to PWRGD Low
GATE High to (PWRGD - DRAIN)
High
t
PHLGH
Figures 1a, 5b; B and F versions
8.2
ms
TURN-OFF
Latch-Off Period
t
OFF
(Note 3)
A, B, E, F versions
128 x
t
PHLCL
ms
Note 1:   All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to V
EE
,
unless otherwise specified.
Note 2:   Gate pulldown current after the current limit to GATE low (t
PHLCL
) time has elapsed.
Note 3:   Minimum duration of GATE pulldown following a circuit breaker fault. The MAX5921_ automatically restarts after a circuit
breaker fault. The MAX5939_ is latched off and can be reset by toggling UV low. The GATE pulldown does not release until
t
OFF
has elapsed.
Note 4:   The min/max limits are 100% production tested at +25?/SPAN>C and +85?/SPAN>C and guaranteed by design at -40?/SPAN>C.
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