參數(shù)資料
型號： MAX5865ETM
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 無繩電話/電話
英文描述： Ultra-Low-Power, High-Dynamic- Performance, 40Msps Analog Front End
中文描述： TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, QCC48
封裝： 7 X 7 MM, 0.80 MM HEIGHT, TQFN-48
文件頁數(shù)： 7/26頁
文件大小： 2144K
代理商： MAX5865ETM
M
Ultra-Low-Power, High-Dynamic-
Performance, 40Msps Analog Front End
_______________________________________________________________________________________
7
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3V, OV
DD
= 1.8V, internal reference (1.024V), C
L
≈
10pF on all digital outputs, f
CLK
= 40MHz, ADC input amplitude = -0.5dBFS,
DAC output amplitude = 0dBFS, differential ADC input, differential DAC output, C
REFP
= C
REFN
= C
COM
= 0.33μF, Xcvr mode, unless
otherwise noted. Typical values are at T
A
= +25
°
C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Low Threshold
V
INL
DD0
–
DD9, CLK, SCLK, DIN,
CS
0.3 x
OV
DD
V
Input Leakage
DI
IN
DD0
–
DD9, CLK, SCLK, DIN,
CS
= OGND or
OV
DD
±
5
μA
Input Capacitance
DIGITAL OUTPUTS (DA0
–
DA7)
DC
IN
5
pF
Output Voltage Low
V
OL
I
SINK
= 200μA
0.2 x
OV
DD
V
Output Voltage High
V
OH
I
SOURCE
= 200μA
0.8 x
OV
DD
V
Tri-State Leakage Current
Tri-State Output Capacitance
I
LEAK
C
OUT
±
5
μA
pF
5
Note 1:
Specifications from T
A
= +25
°
C to +85
°
C are guaranteed by product tests. Specifications from T
A
= +25
°
C to -40
°
C are
guaranteed by design and characterization.
Note 2:
The minimum clock frequency for the MAX5865 is 22MHz.
Note 3:
SNR, SINAD, SFDR, HD3, and THD are based on a differential analog input voltage of -0.5dBFS referenced to the amplitude
of the digital outputs. SINAD and THD are calculated using HD2 through HD6.
Note 4:
Guaranteed by design and characterization.
Note 5:
Crosstalk rejection is measured by applying a high-frequency test tone to one channel and a low-frequency tone to the sec-
ond channel. FFTs are performed on each channel. The parameter is specified as the power ratio of the first and second
channel FFT test tone bins.
Note 6:
Amplitude/phase matching is measured by applying the same signal to each channel, and comparing the magnitude and
phase of the fundamental bin on the calculated FFT.
Typical Operating Characteristics
(V
DD
= DV
DD
= 3V, OV
DD
= 1.8V, internal reference (1.024V), C
L
≈
10pF on all digital outputs, f
CLK
= 40MHz 50% duty cycle, ADC
input amplitude = -0.5dBFS, DAC output amplitude = 0dBFS, differential ADC input, differential DAC output, C
REFP
= C
REFN
=
C
COM
= 0.33μF, Xcvr mode, T
A
= +25
°
C, unless otherwise noted.)
-110
-70
-80
-90
-100
-30
-40
-50
-60
-10
-20
HD3
HD2
Q
A
IA
0
0
4
8
12
16
20
ADC CHANNEL-IA FFT PLOT
M
FREQUENCY (MHz)
A
f
CLK
= 40MHz
f
IA
= 12.499MHz
f
QA
= 19.99MHz
A
= A
= 0.5dBFS
8192-POINT DATA RECORD
-110
-70
-80
-90
-100
-30
-40
-50
-60
-10
-20
I
A
0
0
4
8
12
16
20
ADC CHANNEL-QA FFT PLOT
M
FREQUENCY (MHz)
A
f
CLK
= 40MHz
f
IA
= 12.499MHz
f
QA
= 19.99MHz
A
= A
= 0.5dBFS
8192-POINT DATA RECORD
HD2
HD3
QA
-110
-70
-80
-90
-100
-30
-40
-50
-60
-10
-20
f
2
0
0
4
8
12
16
20
ADC CHANNEL-IA TWO-TONE FFT PLOT
M
FREQUENCY (MHz)
A
f
1
f
CLK
= 40MHz
f
1
= 1.8MHz
f
2
= 2.2MHz
A
IA
= A
QA
= -7dBFS PER TONE
8192-POINT DATA RECORD
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