參數(shù)資料
型號: MAX5858ECM
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: Dual, 10-Bit, 300Msps, Current-Output DAC with 4x/2x/1x Interpolation Filters
中文描述: PARALLEL, WORD INPUT LOADING, 0.011 us SETTLING TIME, 10-BIT DAC, PQFP48
封裝: 7 X 7 MM, 1 MM HEIGHT, MO-136AE, TQFP-48
文件頁數(shù): 6/23頁
文件大?。?/td> 809K
代理商: MAX5858ECM
M
Dual, 10-Bit, 300Msps, Current-Output DAC with
4x/2x/1x Interpolation Filters
6
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= DV
DD
= CV
DD
= 3V, AGND = DGND = CGND = 0, f
DAC
= 165Msps, no interpolation, external reference, V
REF
= 1.2V,
I
FS
= 20mA, output amplitude = 0dB FS, differential output, T
A
= T
MIN
to T
MAX
, unless otherwise noted. T
A
> +25
°
C guaranteed by
production test. T
A
< +25
°
C guaranteed by design and characterization. Typical values are at T
A
= +25
°
C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
34
75
72
54
146
140
172
165
MAX
UNITS
No interpolation
2x interpolation
4x interpolation
No interpolation
2x interpolation
4x interpolation
2x interpolation
4x interpolation
f
DAC
= 60Msps
61
f
DAC
= 165Msps
186
178
3.3
Digital Supply Current (Note 4)
I
DVDD
f
DAC
= 200Msps
mA
Clock Power-Supply Voltage
CV
DD
2.7
V
f
DAC
= 60Msps
f
DAC
= 165Msps
f
DAC
= 200Msps, 2x interpolation or 4x
interpolation
25
69
80
Clock Supply Current (Note 4)
I
CVDD
80
94
mA
Standby Current
Power-Down Current
I
STANDBY
I
PD
(Note 5)
(Note 5)
4.4
1
312
435
426
504
780
762
891
870
4.8
mA
μA
No interpolation
2x interpolation
4x interpolation
No interpolation
2x interpolation
4x interpolation
2x interpolation
4x interpolation
f
DAC
= 60Msps
570
f
DAC
= 165Msps
Total Power Dissipation
P
TOT
f
DAC
= 200Msps
mW
Note 1:
Including the internal reference voltage tolerance.
Note 2:
Measured single ended with 50
load and complementary output connected to ground.
Note 3:
Guaranteed by design, not production tested.
Note 4:
f
OUT
= 5MHz.
Note 5:
All digital inputs at 0 or DV
DD
. Clock signal disabled.
TO OUTPUT
PIN
5pF
0.5mA
0.5mA
1.6V
Figure 1. Load Test Circuit for CLK Outputs
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