參數(shù)資料
型號: MAX5852
廠商: Maxim Integrated Products, Inc.
英文描述: Quadruple 2-Input Exclusive-OR Gates 14-CDIP -55 to 125
中文描述: 雙路、8位、165Msps、電流輸出DAC
文件頁數(shù): 11/18頁
文件大?。?/td> 1290K
代理商: MAX5852
Detailed Description
The MAX5852 dual, high-speed, 8-bit, current-output
DAC provides superior performance in communication
systems requiring low-distortion analog-signal recon-
struction. The MAX5852 combines two DACs and an on-
chip 1.24V reference (Figure 2). The current outputs of
the DACs can be configured for differential or single-
ended operation. The full-scale output current range is
adjustable from 2mA to 20mA to optimize power dissipa-
tion and gain control.
The MAX5852 accepts an input data and a DAC con-
version rate of 165MHz. The inputs are latched on the
rising edge of the clock whereas the output latches on
the following rising edge.
The MAX5852 features three modes of operation: normal,
standby, and power-down (Table 2). These modes allow
efficient power management. In power-down, the
MAX5852 consumes only 1μA of supply current. Wake-up
time from standby mode to normal DAC operation is 3μs.
Programming the DAC
An 8-bit control word routed through channel A’s data
port programs the gain matching, reference, and the
operational mode of the MAX5852. The control word is
latched on the rising edge of
CW
.
CW
is independent
of the DAC clock. The DAC clock can always remain
running, when the control word is written to the DAC.
Table 1 and Table 2 represent the control word format
and function.
The gain on channel A can be adjusted to achieve gain
matching between two channels in a user’s system.
The gain on channel A can be adjusted from -0.4dB to
+0.35dB in steps of 0.05dB by using bits G3 to G0 (see
Table 3).
M
Dual, 8-Bit, 165Msps, Current-Output DAC
______________________________________________________________________________________
11
Pin Description (continued)
PIN
NAME
FUNCTION
32
REFR
Full-Scale Current Adjustment. To set the output full-scale current, connect an external resistor RSET
between REFR and AGND. The output full-scale current is equal to 32 x V
REFO
/R
SET
.
Anal og P ow er Inp ut. S ee the
P ow er S up p es, Byp assi ng D ecoup ng and Layout
secti on for m or e d etai s.
Channel B Negative Analog Current Output
Channel B Positive Analog Current Output
Analog Ground
Channel A Negative Analog Current Output
Channel A Positive Analog Current Output
Exposed Paddle. Connect EP to the common point of all ground planes.
33, 39
34
35
36, 40
37
38
AV
DD
OUTNB
OUTPB
AGND
OUTNA
OUTPA
EP
8-BIT
DACA
CHANNEL A
GAIN
CONTROL
DA0/G0
DA1/G1
DA2/G2
DA3/G3
DA4/REN
DA5/IDE
DA6/DACEN
DA7/PD
D
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
D
C
CW
G0
G1
G2
G3
OPERATING
MODE
CONTROLLER
DACEN
PD
INPUT DATA
INTERLEAVER
8-BIT
DACB
CLOCK
DISTRIBUTION
1.24V REFERENCE
AND CONTROL
AMPLIFIER
CLOCK
POWER
MANAGEMENT
DCE
CLKXP
CLKXN
CLK
DIGITAL
POWER
MANAGEMENT
ANALOG
POWER
MANAGEMENT
MAX5852
DV
DD
DGND
CV
DD
CGND
IDE
REN
REFR
REFO
R
SET
AGND
OUTNB
OUTPB
OUTNA
OUTPA
AGND
AV
DD
Figure 2. Simplified Diagram
相關PDF資料
PDF描述
MAX5852ETL Quadruple 2-Input Exclusive-OR Gates 14-CFP -55 to 125
MAX5858 Quadruple 2-Input Exclusive-OR Gates 14-CDIP -55 to 125
MAX5858ECM Dual, 10-Bit, 300Msps, Current-Output DAC with 4x/2x/1x Interpolation Filters
MAX5863 Quadruple Differential Line Receiver 16-CDIP -55 to 125
MAX5863ETM 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
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