參數(shù)資料
型號(hào): MAX561
廠商: Maxim Integrated Products, Inc.
英文描述: 3.3V Transceiver with Two EIA TIA 562 Receivers Active in Shutdown
中文描述: 3.3V收發(fā)器、兩個(gè)EIA TIA 562接收器,關(guān)斷后保持有效
文件頁(yè)數(shù): 9/16頁(yè)
文件大小: 667K
代理商: MAX561
M
16-Bit DACs with 32-Channel
Sample-and-Hold Outputs
_______________________________________________________________________________________
9
Detailed Description
Digital-to-Analog Converter
The MAX5631/MAX5632/MAX5633 16-bit digital-to-ana-
log converters (DAC) are composed of two matched
sections. The four MSBs are derived through 15 identi-
cal matched resistors and the lower 12 bits are derived
through a 12-bit inverted R-2R ladder.
Sample-and-Hold Amplifiers
The MAX5631/MAX5632/MAX5633 contain 32 buffered
sample/hold circuits with internal hold capacitors.
Internal hold capacitors minimize leakage current,
dielectric absorption, feedthrough, and required board
space. MAX5631/MAX5632/MAX5633 provide a very low
1mV/s droop rate.
Output
The MAX5631/MAX5632/MAX5633 include output buffers
on each channel. The device contains output resistors in
series with the buffer output (Figure 3) for ease of output
filtering and capacitive load driving stability.
Output loads increase the analog supply current (I
DD
and I
SS
). Excessively loading the outputs drastically
increases power dissipation. Do not exceed the maxi-
mum power dissipation specified in the
Absolute
Maximum Ratings
.
The maximum output voltage range depends on the
analog supply voltages available and the output clamp
voltages (see
Output Clamp
).
The device has a fixed theoretical output range deter-
mined by the reference voltage, gain, and midscale offset.
The output voltage for a given input code is calculated
with the following:
where code is the decimal value of the DAC input
code, V
REF
is the reference voltage, and V
GS
is the
V
code
65535
V
V
OUT
REF
GS
=
)
+
(
5 2428
-
1.6214 V
REF
V
V
V
V
V
SS
OUT
DD
+
(
)
(
)
0 75
.
2 4
.
_
-
Table 1. Code Table
DAC INPUT CODE
MSB LSB
1111 1111 1111 1111
1100 0111 0100 1010
1000 0000 0000 0000
0100 1111 0010 1100
0010 1000 0001 1100
0000 0000 0000 0000
NOMINAL OUTPUT
VOLTAGE (V)
9.0535
6.15
2.5
0
-2.0
-4.0535
V
REF
= +2.5V
Full-scale output
Maximum output with V
DD
= 8.55V
Midscale output
V
OUT_
= 0. All outputs default to this code after power-up
Minimum output with V
SS
= -2.75V
Zero-scale output
t
CSHO
t
CH
t
CSSO
t
CL
t
DH
t
DS
t
CSH1
t
CSS1
CS
SCLK
DIN
B23
B22
B0
Figure 2. Serial Interface Timing Diagram
相關(guān)PDF資料
PDF描述
MAX5622 16-Bit DACs with 16-Channel Sample-and-Hold Outputs
MAX5623 16-Bit DACs with 16-Channel Sample-and-Hold Outputs
MAX5633 16-Bit DACs with 32-Channel Sample-and-Hold Outputs
MAX563CPN +3.3V-Powered, EIA/TIA-562 Dual Transceiver with Receivers Active in Shutdown
MAX563CWN +3.3V-Powered, EIA/TIA-562 Dual Transceiver with Receivers Active in Shutdown
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