參數(shù)資料
型號(hào)： MAX5534ETC
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： DAC
英文描述： Dual, Ultra-Low-Power, 12-Bit, Voltage-Output DACs
中文描述： DUAL, PARALLEL, WORD INPUT LOADING, 660 us SETTLING TIME, 12-BIT DAC, QCC12
封裝： 4 X 4 MM, 0.80 MM HEIGHT, MO-220, TQFN-12
文件頁數(shù)： 19/24頁
文件大小： 1554K
代理商： MAX5534ETC
M
Dual, Ultra-Low-Power,
12-Bit, Voltage-Output DACs
______________________________________________________________________________________
19
Voltage Biasing a
Current-Output Transducer
See the circuit in
Figure
5 for an illustration of how to
configure the MAX5534/MAX5535 to bias a current-out-
put transducer. In
Figure
5, the output voltage of the
MAX5534/MAX5535 is a function of the voltage drop
across the transducer added to the voltage drop
across the feedback resistor R.
Unipolar Output
Figure
6 shows the MAX5534 in a unipolar output con-
figuration with unity gain.
Table
4 lists the unipolar out-
put codes.
Bipolar Output
The MAX5534 output can be configured for bipolar
operation as shown in
Figure
7. The output voltage is
given by the following equation:
V
OUT_
= V
REFIN
x [(N
A
- 2048) / 2048]
where N
A
represents the decimal value of the DAC’s
binary input code.
Table
5 shows the digital codes (off-
set binary) and the corresponding output voltage for
the circuit in
Figure
7.
Configurable Output Gain
The MAX5534/MAX5535 have force-sense outputs,
which provide a connection directly to the inverting termi-
nal of the output op-amp, yielding the most flexibility. The
advantage of the force-sense output is that specific gains
can be set externally for a given application. The gain
error for the MAX5534/MAX5535 is specified in a unity-
gain configuration (op-amp output and inverting termi-
nals connected), and additional gain error results from
external resistor tolerances. Another advantage of the
force-sense DAC is that it allows many useful circuits to
be created with only a few simple external components.
An example of a custom fixed gain using the MAX5534/
MAX5535 force-sense output is shown in
Figure
8. In
this example, R1 and R2 set the gain for V
OUTA
.
V
OUTA
= [(V
REFIN
x N
A
) / 4096] x [1 + (R2 / R1)]
where N
A
represents the numeric value of the DAC
input code.
Self-Biased Two-Electrode
Potentiostat Application
See the circuit in
Figure
10 for an illustration of how to
use the MAX5535 to bias a two-electrode potentiostat
on the input of an ADC.
Power Supply and
Bypassing Considerations
Bypass the power supply with a 0.1μF capacitor to GND.
Minimize lengths to reduce lead inductance. If noise
becomes an issue, use shielding and/or ferrite beads to
increase isolation. For the thin QFN package, connect the
exposed pad to ground.
Layout Considerations
Digital and AC transient signals coupling to GND can
create noise at the output. Use proper grounding tech-
niques, such as a multilayer board with a low-inductance
ground plane. Wire-wrapped boards and sockets are not
recommended. For optimum system performance, use
printed circuit (PC) boards. Good PC board ground lay-
out minimizes crosstalk between DAC outputs, reference
inputs, and digital inputs. Reduce crosstalk by keeping
analog lines away from digital lines.
Table
4. Unipolar Code
Table
(Gain = +1)
DAC CONTENTS
MSB
1111
1111
1000
0000
1000
0000
0111
1111
0000
0000
0000
0000
LSB
1111
0001
0000
1111
0001
0000
ANALOG OUTPUT
+V
REF
(4095/4096)
+V
REF
(2049/4096)
+V
REF
(2048/4096) = +V
REF
/ 2
+V
REF
(2047/4096)
+V
REF
(1/4096)
0V
Table
5. Bipolar Code
Table
(Gain = +1)
DAC CONTENTS
MSB
1111
1111
1000
0000
1000
0000
0111
1111
0000
0000
0000
0000
LSB
1111
0001
0000
1111
0001
0000
ANALOG OUTPUT
+V
REF
(2047/2048)
+V
REF
(1/2048)
0V
-V
REF
(1/2048)
-V
REF
(2047/2048)
-V
REF
(2048/2048) = -V
REF
N
A
IS THE DAC INPUT CODE
(0 TO 4095 DECIMAL).
REFIN
MAX5534
OUT_
FB_
OUT
= V
REFIN
×
N
A
V
DAC
Figure
6. Unipolar Output Circuit
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