參數(shù)資料
型號： MAX549
廠商： Maxim Integrated Products, Inc.
英文描述： +2.5V to +5.5V, Low-Power, Single/Dual, 8-Bit Voltage-Output DACs in レMAX Package
中文描述： 2.5V至5.5V，低功耗，單/雙，8位電壓在レmax包裝輸出DAC
文件頁數(shù)： 9/16頁
文件大?。?/td> 172K
代理商： MAX549
M
+2.5V to +5.5V, Low-Power, S ingle/Dual,
8-Bit Voltage-Output DACs in μMAX Pac kage
_______________________________________________________________________________________
9
Table 2. MAX548A Serial-Interface Programming Commands
CONTROL BYTE
Loaded First
UB1
A1
C0
C1
UB3
C2
UB2
UNASSIGNED COMMANDS
COMMAND
(Commands executed on
CS
’s rising edge)
LDAC
COMMANDS LOADING INPUT REGISTER(S) ONLY
X
Unassigned operation
X
XXXXXXXX
0
0
X
X
X
1
X
X
Unassigned command
X
XXXXXXXX
0
0
X
0
X
0
X
Loaded Last
D7........D0
Pin 6
A0
X
Load DAC B input register and update both DAC
registers. DAC A input register unchanged.
0
8-Bit DAC Data
X
Load DAC A input register and update both DAC
registers. DAC B input register unchanged.
0
8-Bit DAC Data
0
1
1
1
X
0
X
1
0
1
1
X
0
X
Update both DAC registers with current contents
of their input registers. Both input registers
unchanged.
0
0
0
1
1
X
0
X
X
X
Load both DAC input registers and update both
DAC registers.
X
8-Bit DAC Data
1
1
0
1
X
0
X
X
Load DAC B input register and update both DAC
registers. DAC A input register unchanged.
X
8-Bit DAC Data
0
1
0
1
X
0
X
X
Load both DAC input registers. Both DAC regis-
ters unchanged.
X
8-Bit DAC Data
1
1
X
0
X
0
X
X
Load DAC B input register. DAC A input register
and both DAC registers unchanged.
X
8-Bit DAC Data
0
1
X
0
X
0
X
X
Load DAC A input register and update both DAC
registers. DAC B input register unchanged.
X
8-Bit DAC Data
1
0
0
1
X
0
X
X
Load DAC A input register. DAC B input register
and both DAC registers unchanged.
Update both DAC registers with current contents
of their input registers. Both input registers
unchanged.
X
X
8-Bit DAC Data
XXXXXXXX
1
0
0
0
X
0
0
1
X
0
X
0
X
X
X
DATA BYTE
XXXXXXXX
COMMANDS UPDATING DAC REGISTER(S)
X
Load both DAC input registers and update both
DAC registers.
0
8-Bit DAC Data
1
1
1
1
X
0
X
COMMANDS UTILIZING THE ASYNCHRONOUS LOAD FUNCTION
X
After
CS
’s rising edge and on
LDAC
’s falling
edge, update both DAC registers with current
contents of their input registers. Both input regis-
ters unchanged.
1
XXXXXXXX
0
0
1
1
X
0
X
X
Load DAC A input register. After
CS
’s rising edge
and on
LDAC
’s falling edge, update both DAC
registers.
1
8-Bit DAC Data
1
0
1
1
X
0
X
X
Load DAC B input register. After
CS
’s rising edge
and on
LDAC
’s falling edge, update both DAC
registers.
1
8-Bit DAC Data
0
1
1
1
X
0
X
X
Load both DAC input registers. After
CS
’s rising
edge and on
LDAC
’s falling edge, update both
DAC registers.
1
8-Bit DAC Data
1
1
1
1
X
0
X
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