- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385533 > MAX5295EUE (MAXIM INTEGRATED PRODUCTS INC) Single Supply RS232C Line Driver/Receiver(?????μ?o?RS232C ?o?????????¨???2???2??????) PDF資料下載
參數(shù)資料
| 型號： | MAX5295EUE |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | DAC |
| 英文描述： | Single Supply RS232C Line Driver/Receiver(?????μ?o?RS232C ?o?????????¨???2???2??????) |
| 中文描述： | SERIAL INPUT LOADING, 2 us SETTLING TIME, 8-BIT DAC, PDSO16 |
| 封裝： | 6.50 X 5 MM, MO-153AB, TSSOP-16 |
| 文件頁數(shù)： | 25/33頁 |
| 文件大?。?/td> | 941K |
| 代理商： | MAX5295EUE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁當(dāng)前第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁
M
Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,
Voltage-Output DACs
______________________________________________________________________________________
25
User-Programmable Input/Output (UPIO)
Configuration
Table 22 lists the possible configurations for UPIO1 and
UPIO2. UPIO1 and UPIO2 use the selected function
when configured by the UP3
–
UP0 configuration bits.
LDAC
LDAC
controls loading of the DAC registers. When
LDAC
is high, the DAC registers are latched, and any
change in the input registers does not affect the con-
tents of the DAC registers or the DAC outputs. When
LDAC
is low, the DAC registers are transparent, and the
values stored in the input registers are fed directly to the
DAC registers, and the DAC outputs are updated.
Drive
LDAC
low to asynchronously load the DAC regis-
ters from their corresponding input registers (DACs that
are in shutdown remain shut down). The
LDAC
function
does not require any activity on
CS
, SCLK, or DIN. If
LDAC
is brought low coincident with a rising edge of
CS,
(which executes a serial command modifying the
value of either DAC input register), then
LDAC
must
remain asserted for at least 120ns following the
CS
ris-
ing edge. This requirement applies only to serial com-
mands that modify the value of the DAC input registers.
See Figures 5 and 6 for timing details.
Table 22. UPIO Configuration Register Bits (UP3
–
UP0)
UPIO CONFIGURATION BITS
UP3
UP2
UP1
UP0
FUNCTION
DESCRIPTION
0
0
0
0
LDAC
Active-Low Load DAC Input. Drive low to asynchronously load all DAC registers
with data from input registers.
0
0
0
0
0
0
0
0
1
1
0
1
1
0
0
1
0
1
0
1
SET
MID
CLR
PDL
Active-Low Input. Drive low to set all input and DAC registers to full scale.
Active-Low Input. Drive low to set all input and DAC registers to midscale.
Active-Low Input. Drive low to set all input and DAC registers to zero scale.
Active-Low Power-Down Lockout Input. Drive low to disable software shutdown.
This mode is reserved. Do not use.
Reserved
0
1
1
0
SHDN1K
Active-Low 1k
Shutdown Input. Overrides PD_1 and PD_0 settings. Drive
SHDN1K
low to pull OUTA and OUTB to AGND with 1k
.
0
1
1
1
SHDN100K
Active-Low 100k
Shutdown Input. Overrides PD_1 and PD_0 settings. For the
MAX5290/MAX5292/MAX5294, drive
SHDN100K
low to pull OUTA and OUTB to
AGND with 100k
. For the MAX5291/MAX5293/MAX5295, drive
SHDN100K
low to
leave OUTA and OUTB high impedance.
1
1
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
DOUTRB
DOUTDC0
DOUTDC1
GPI
GPOL
GPOH
Data Read-Back Output
Mode 0 Daisy-Chain Data Output. Data is clocked out on the falling edge of SCLK.
Mode 1 Daisy-Chain Data Output. Data is clocked out on the rising edge of SCLK.
General-Purpose Logic Input
General-Purpose Logic-Low Output
General-Purpose Logic-High Output
1
1
1
0
TOGG
Toggle Input. Toggles DAC outputs between data in input registers and data in
DAC registers. Drive low to set all DAC outputs to values stored in input registers.
Drive high to set all DAC outputs to values stored in DAC registers.
1
1
1
1
FAST
FAST/SLOW Settling-Time Mode Input. Drive low to select FAST mode (3μs) or
drive high to select SLOW settling mode (10μs). Overrides the SPDA and SPDB
settings.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX5290BETE | Buffered, Fast-Settling, Dual, 12-/10-/8-Bit, Voltage-Output DACs |
| MAX5291BETE | Buffered, Fast-Settling, Dual, 12-/10-/8-Bit, Voltage-Output DACs |
| MAX530 | +5V, Low-Power, Parallel-Input, Voltage-Output, 12-Bit DAC(單通道,電壓輸出,12位并行D/A轉(zhuǎn)換器) |
| MAX5312EAE | +-10V, 12-Bit, Serial, Voltage-Output DAC |
| MAX531 | +5V, Low-Power, Voltage-Output, Serial 12-Bit DACs(單通道,電壓輸出,12位串行D/A轉(zhuǎn)換器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX5295EUE+ | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 8-Bit 2Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5295EUE+T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 8-Bit 2Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5295EUE-T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX529C/D | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX529CAG | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。