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參數(shù)資料
| 型號： | MAX500BMJE |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | DAC |
| 英文描述： | CMOS, Quad, Serial-Interface 8-Bit DAC |
| 中文描述： | SERIAL INPUT LOADING, 2.5 us SETTLING TIME, 8-BIT DAC, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁數(shù)： | 12/12頁 |
| 文件大小： | 127K |
| 代理商： | MAX500BMJE |
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12
__________________Maxim Integrated Produc ts, 120 S an Gabriel Drive, S unnyvale, CA 94086 (408) 737-7600
1996 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
M
CMOS , Quad, S erial-Interfac e,
8-Bit DAC
___________________Chip Topography
____Pin Configurations (c ontinued)
CONNECT LOAD TOP1.3 FOR 3-WIRE MODE OR
CONNECT LOAD TOV
DD
FOR 2-WIRE MODE
*
A15
A8
8085/
8088
WR
ALE
AD7
AD0
ENLATCH
ADDRESS BUS
ADDRESS
DECODE
ADDRESS AND DATA BUS
A0
A1
CS
WR
D7
D0
SCL
SDA
LDAC
LOAD*
82C55
PA0
PA1
PA2
PA3
MAX500
. .
CONNECT LOAD TOP1.3 FOR 3-WIRE MODE OR
CONNECT LOAD TOV
DD
FOR 2-WIRE MODE
*
A15
A0
6809/
6502
R/W
Θ
OR E
7
D0
ADDRESS BUS
ADDRESS
DECODE
DATA BUS
C32
R/W
E
DB7
DB0
6821
6521PA0
PA1
PA2
PA3. .
SCL
SDA
LDAC
LOAD*
MAX500
Figure 15. 8085/8088 with Programmable Peripheral Interface
Figure 16. 6809/6502 Interface
V
REF
C
V
REF
D
SRO
V
REF
B
V
REF
A
AGND
Vss V
OUT
A
V
OUT
B
V
DD
SCL
LOAD
LDAC
DGND
SDA
0.159"
(4.039mm)
0.150"
(3.810mm)
V
OUT
C
V
OUT
D
14
16
17
18
4
5
6
7
8
3
2
1
2
1
9
1
1
1
1
MAX500
V
SS
V
REF
A/B
AGND
N.C.
N.C.
V
DD
V
REF
C
V
REF
D
SRO
N.C.
V
O
A
V
O
B
N
V
O
C
V
O
D
D
L
S
L
S
LCC
TOP VIEW
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