Applications Information
Output Match
The MAX3510’s output circuit is an open-collector dif-
ferential amplifier. An on-chip resistor across the collec-
tors provides a nominal output impedance of 300
in
transmit mode and transmit disable mode.
Transformer
To match the output of the MAX3510 to a 75
load, a
2:1 (voltage ratio) transformer is required. This trans-
former must have adequate bandwidth to cover the
intended application. Note that most RF transformers
specify bandwidth with a 50
source on the primary
and a matching resistance on the secondary winding.
Operating in a 75
system will tend to shift the low-fre-
quency edge of the transformer bandwidth specifica-
tion up by a factor of 1.5, due to primary inductance.
Keep this in mind when specifying a transformer.
Bias to the output stage is provided through the center
tap on the transformer primary. This greatly diminishes
the on/off transients present at the output when switch-
ing between transmit and transmit-disable modes.
Commercially available transformers typically have
adequate balance between half-windings to achieve
substantial transient cancellation.
Finally, keep in mind that transformer core inductance
varies proportionally with temperature. If the application
requires low temperature extremes (less than 0°C),
adequate primary inductance must be present to sus-
tain low-frequency output capability as temperatures
drop. In general this will not be a problem, as modern
RF transformers have adequate bandwidth.
Input Circuit
To achieve rated performance, the input of the
MAX3510 must be driven differentially with an appropri-
ate input level. The differential input impedance is
approximately 1.5k
. Most applications will require a
differential lowpass filter preceding the device. The fil-
ter design will dictate terminating impedance of a spec-
ified value. Place this load impedance across the
AC-coupled input pins (see Typical Operating Circuit).
The MAX3510 has sufficient gain to produce an output
level of 60dBmV (CW through a 2:1 transformer) when
driven with a 34dBmV input signal. Rated performance
is achieved with this input level. When a lower input
level is present, the maximum output level will be
reduced proportionally and output linearity will
increase. If an input level greater than 34dBmV is used,
the 3rd-order distortion performance will degrade
slightly.
If a single-ended source drives the MAX3510, one of the
input terminals must be capacitively coupled to ground
(VIN+ or VIN-). The value of this capacitor must be
large enough to look like a short circuit at the lowest
frequency of interest. For operation at 5MHz with a 75
source impedance, a value of 0.1μF will suffice.
M
Upstream CATV Amplifier
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9
SHDN
0
0
TXEN
Table 3. Chip-State Control Bits
0
1
1
1
1
1
1
1
1
1
0
1
1
1
1
X
D7
1
1
1
1
1
1
1
1
1
1
1
1
X
X
X
X
X
X
D6
X
X
X
X
X
X
0
—
0
X
D5
—
1
1
1
X
X
0
—
0
X
D4
—
1
1
0
X
X
0
—
0
X
D3
—
1
1
0
X
X
0
—
0
X
D2
—
1
1
0
X
X
0
—
0
X
D1
—
1
1
0
X
X
1
—
0
X
D0
—
1
0
0
X
X
1
—
0
X
GAIN STATE
(DECIMAL)
—
63
62
32
Software-Shutdown Mode
Transmit Mode
Gain = -31dB*
—
Gain = -32dB*
Shutdown Mode
STATE
—
Gain = 30dB*
Gain = 29dB*
Gain = 0dB*
*Typical gain at +25°C and V
CC
= +5V
1
0
1
X
X
X
X
X
X
X
X
Transmit-Disable Mode