參數(shù)資料
型號(hào)： MAX3349EA
廠商： Maxim Integrated Products, Inc.
英文描述： USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode
中文描述： USB 2.0全速收發(fā)器，提供UART復(fù)用模式
文件頁(yè)數(shù)： 12/17頁(yè)
文件大?。?/td> 397K
代理商： MAX3349EA
M
USB 2.0 Full-Speed Transceiver with UART
Multiplexing Mode
12
______________________________________________________________________________________
D+ and D-
D+ and D- are either USB signals or UART signals,
depending on the operating mode. In USB mode,
D+/D- serve as receiver inputs when
OE
is logic-high
and transmitter outputs when
OE
is logic-low. Internal
series resistors are provided on D+ and D- to allow a
direct interface with a USB connector. In UART mode,
D+ is an input and D- is an output. UART signals on Tx
are presented on D-, and signals on D+ are presented
on Rx. The UART signaling levels for D+/D- are deter-
mined by V
UART
. Logic thresholds for Rx and Tx are
determined by V
L
. D+ and D- are ESD protected to
±15kV HBM.
RCV
RCV is the output of the differential USB receiver. RCV
is a logic 1 for D+ high and D- low. RCV is a logic 0 for
D+ low and D- high. RCV retains the last valid logic
state when D+ and D- are both low (SE0). RCV is driven
logic-low when SUS is high. See Tables 3a and 3b.
BD
The bus-detect (BD) output is asserted logic-high when
a voltage greater than V
TH-BUS
is presented on V
BUS
.
This is typically the case when the MAX3349EA is con-
nected to a powered USB. BD is logic-low when V
BUS
is unconnected.
ESD Protection
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against electro-
static discharges encountered during handling and
assembly. Additional ESD-protection structures guard
D+ and D- against damage from ESD events up to
±15kV. The ESD structures arrest ESD events in all
operating modes: normal operation, suspend mode,
and when the device is unpowered.
Several ESD testing standards exist for gauging the
robustness of ESD structures. The ESD protection of the
MAX3349EA is characterized to the following standards:
±15kV Human Body Model (HBM)
±8kV Air-Gap Discharge per IEC 61000-4-2
±8kV Contact Discharge per IEC 61000-4-2
Human Body Model
Figure 9 shows the model used to simulate an ESD
event resulting from contact with the human body. The
model consists of a 100pF storage capacitor that is
charged to a high voltage, then discharged through a
1.5k
resistor. Figure 10 shows the current waveform
when the storage capacitor is discharged into a low
impedance.
IEC 61000-4-2 Contact Discharge
The IEC 61000-4-2 standard covers ESD testing and
performance of finished equipment. It does not specifi-
cally refer to integrated circuits. The major difference
between tests done using the Human Body Model and
IEC 61000-4-2 is a higher peak current in IEC 61000-4-2
due to lower series resistance. Hence, the ESD with-
stand voltage measured to IEC 61000-4-2 is typically
lower than that measured using the Human Body Model.
Figure 11 shows the IEC 61000-4-2 model. The Contact
Discharge method connects the probe to the device
before the probe is charged. Figure 12 shows the
current waveform for the IEC 61000-4-2 Contact
Discharge Model.
ESD Test Conditions
ESD performance depends on a variety of conditions.
Please contact Maxim for a reliability report document-
ing test setup, methodology, and results.
Applications Information
Data Transfer in USB Mode
Transmitting Data to the USB
To transmit data to the USB, operate the MAX3349EA in
USB mode (see the
Operating Modes
section), and
drive
OE
low. The MAX3349EA transmits data to the
USB differentially on D+ and D-. VP and VM serve as
differential input signals to the driver. When VP and VM
are both driven low, a single-ended zero (SE0) is output
on D+/D-.
Receiving Data from the USB
To receive data from the USB, operate the MAX3349EA
in USB mode (see the
Operating Modes
section.) Drive
OE
high and SUS low. Differential data received at
D+/D- appears as a logic signal at RCV. VP and VM are
the outputs of single-ended receivers on D+ and D-.
Data Transfer in UART Mode
In UART mode, D+ is an input and D- is an output.
UART signals on Tx are presented on D-, and signals
on D+ are presented on Rx. The UART signaling levels
for D+/D- are determined by V
UART
. The voltage
thresholds for Rx and Tx are determined by V
L
. The
voltage thresholds for D+ and D- are determined by
V
UART
.
Power-Supply Decoupling
Bypass V
BUS
, V
L
, and V
UART
to ground with 0.1μF
ceramic capacitors. Additionally, bypass V
TRM
to
ground with a 1μF ceramic capacitor. Place all bypass
capacitors as close as possible to the device .
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