SPI/I2C UART with 128-Word FIFOs The XOFF1 and XOFF2 register contents define th" />
參數(shù)資料
型號: MAX3107ETG+T
廠商: Maxim Integrated Products
文件頁數(shù): 35/52頁
文件大小: 0K
描述: IC UART SPI/I2C 128 FIFO 24TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
特點: 內(nèi)部振蕩器
通道數(shù): 4,QUART
FIFO's: 128 字節(jié)
規(guī)程: RS232,RS485
電源電壓: 2.35 V ~ 3.6 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
安裝類型: 表面貼裝
封裝/外殼: 24-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-TQFN-EP(3.5x3.5)
包裝: 標準包裝
其它名稱: MAX3107ETG+TDKR
SPI/I2C UART with 128-Word FIFOs
The XOFF1 and XOFF2 register contents define the XOFF characters for auto XON/XOFF flow control and/or special
characters used in special character detection. See details in the FlowCtrl register description.
Bits 7–0: Bit[7:0]
These bits define the XOFF2 character if auto software flow control is enabled in FlowCntrl[7:4]. If double-char-
acter flow control is selected in FlowCntrl[7:4], these bits constitute the MSB of the XOFF character. If special
character detection is enabled in MODE2[4] and auto flow control is not enabled, these bits define a special
character. If both special character detection and auto flow control are enabled (MODE2[4] and FlowCntrl[3]),
these bits define a special character.
The four GPIOs can be configured as inputs or outputs and can be operated in push-pull or open-drain mode. The
reference clock has to be active for the GPIOs to work.
Bits 7–4: GP[3:0]OD
Set the GP[3:0]OD bits to 1 to configure open-drain output or input operation. If GP[3:0]OD are 0 (default), the
GPIO_are push-pull outputs, if configured as outputs in GPIOConfg[3:0]. If configured as inputs in GPIOConfg[3:0],
the GPIO_ are high-impedance inputs with weak pulldowns.
Bits 3–0: GP[3:0]Out
The GP[3:0]Out bits configure the GPIO_ to be inputs or outputs. Set the GP[3:0]Out bits high to configure the associ-
ated GPIO_ as outputs. The GP[3:0]Out bits which are set low, are configured to be inputs.
Bits 7–4: GPI[3:0]Dat
The GPI[3:0]Dat bits reflect the logic on GPIO_ when configured as inputs through GPIOConfg[3:0].
Bits 3–0: GPO[3:0]Dat
The GPO[3:0]Dat bits allows programming the logic state of the GPIO_, when these are configured as outputs through
GPIOConfg[3:0]. For open-drain operation, pullup resistors are needed on GPIO_.
XOFF2 Register
GPIOConfg—GPIO Configuration Register
GPIOData—GPIO Data Register
ADDRESS:
0x17
MODE:
R/W
BIT
7
6
5
4
3
2
1
0
NAME
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
RESET
0
ADDRESS:
0x18
MODE:
R/W
BIT
7
6
5
4
3
2
1
0
NAME
GP3OD
GP2OD
GP1OD
GP0OD
GP3Out
GP2Out
GP1Out
GP0Out
RESET
0
ADDRESS:
0x19
MODE:
R/W
BIT
7
6
5
4
3
2
1
0
NAME
GPI3Dat
GPI2Dat
GPI1Dat
GPI0Dat
GPO3Dat
GPO2Dat
GPO1Dat
GPO0Dat
RESET
0
40
Maxim Integrated
MAX3107
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