M
Dual Step-Down Controllers Plus Linear-
Regulator Controller for Notebook Computers
22
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PIN
NAME
FUNCTION
25
OVPSET
Overvoltage Protection Control Input. This pin controls the OVP functions for BUCK1 and BUCK2. LINFB is
not affected by OVPSET. Connect OVPSET to V
CC
to disable overvoltage protection for both BUCK1 and
BUCK2. Connect OVPSET to GND for default overvoltage threshold of 2.0V (MAX1816) or 2.25V (MAX1994)
for BUCK1, measured at FBS. The OVP threshold for BUCK2 is always at 115% of the nominal output
voltage. The OVP threshold for BUCK1 can be adjusted by connecting OVPSET between 1.0V and 2.0V. An
overvoltage condition occurs if V
FBS
> V
OVPSET
(MAX1816) or V
FBS
> 1.125
×
V
OVPSET
(MAX1994).
Undervoltage protection thresholds are always enabled and are not affected by this pin.
26
TIME
Slew Rate Adjustment Input. Connect a resistor from TIME to GND to set the internal slew-rate clock. A
680k
to 68k
resistor to GND sets the clock from 53kHz to 530kHz, f
SLEW
= 252kHz
×
(143k
/ R
TIME
).
Linear Regulator Feedback Input. The linear regulator
’
s feedback set point is 1.0V. Connect a resistive
voltage-divider from the collector of the external PNP pass transistor to LINFB. The DC bias current in the
voltage-divider should be greater than 10μA. The linear regulator is active whenever LIN/
SDN
is high.
Open-Drain Power-Good Output for the Linear Regulator. As soon as LINFB is in regulation, LINGOOD
goes high after a 1ms minimum delay. When the output goes out of regulation or LIN/
SDN
goes low,
LINGOOD is forced low within approximately 10μs. A pullup resistor on LINGOOD causes additional
shutdown current.
27
LINFB
28
LINGOOD
29
LINBSE
Linear Regulator Base Drive. Connect LINBSE to the base of an external PNP power transistor. Add a 220
pullup resistor between the base and the emitter.
30
AGND
Analog Ground. Connect the MAX1816/MAX1994s
’
exposed backside pad and low-current ground
terminations to AGND. The current-limit comparator
’
s ground sense for BUCK2 also connects to AGND.
Analog Supply Voltage Input for BUCK1, BUCK2, and the Linear Regulator. This pin supplies all power to
the device except for the MOSFET drivers. The range for V
CC
is 4.5V to 5.5V. Bypass V
CC
to GND with a
minimum capacitance of 1μF. The maximum resistance between V
CC
and V
DD
should be 10
.
2.0V Reference Output. Bypass REF to GND with a minimum capacitance of 0.22μF. The reference is
trimmed with a nominal 50μA load, and can source a total of 100μA for external loads. Loading REF greater
or less than 50μA decreases output-voltage accuracy according to the limits defined in the
Electrical
Characteristics
table.
31
V
CC
32
REF
33
FB2
Adjustable Feedback Input for BUCK2. In adjustable mode, FB2 regulates to 1.00V. It also selects default
voltage. Connect FB2 to GND for 2.5V output, or connect FB2 to V
CC
for 1.8V output.
Output Voltage Connection for BUCK2. Connect directly to the junction of the output filter capacitors. OUT2
senses the output voltage to determine the on-time and also serve as the feedback input in fixed-output
modes.
Current-Sense Input for BUCK2. For accurate current limit, connect CS2 to a sense resistor between the
source of the low-side MOSFET and ground. Alternatively, CS2 can be connected to LX2 for lossless
current sensing across the low-side MOSFET. The current-limit sense voltage for CS2 is set at the ILIM2
BUCK2 Current-Limit Adjustment Input. The current-limit threshold measured between AGND and CS2
defaults to 50mV when ILIM2 is connected to V
CC
. In adjustable mode, the current-limit threshold voltage is
precisely 1/10th of the voltage at ILIM2. The logic threshold for switchover to the default value is
approximately V
CC
- 1V.
Battery Voltage Sense Input. V+ is used only for PWM one-shot timing. DH1 and DH2 on-times are inversely
proportional to input voltage over a 2V to 28V range.
34
OUT2
35
CS2
36
ILIM2
37
V+
38
BST2
BUCK2 Boost Flying Capacitor Connection. An optional resistor in series with BST2 allows the DH1 pullup
current to be adjusted.
Pin Description (continued)