M
Quick-PWM Slave Controller with
Driver Disable for Multiphase DC-DC Converter
______________________________________________________________________________________
17
guarantee full-load operation under worst-case condi-
tions. Furthermore, the inaccurate current limit mandates
the use of MOSFETs and inductors with excessively high
current and power dissipation ratings.
The slave includes a precision current-limit comparator
that supplements the master
’
s current-limit circuitry.
The MAX1980 uses CM+ and CM- to differentially
sense the master
’
s inductor current across a current-
sense resistor, providing a more accurate current limit.
When the master
’
s current-sense voltage exceeds the
current limit set by ILIM in the slave (see the
Dual-Mode
ILIM Input
section), the open-drain current-limit com-
parator pulls LIMIT low (Figure 2). Once the master trig-
gers the current limit, a pulse-width-modulated output
signal appears at LIMIT. This signal is filtered and used
to adjust the master
’
s current-limit threshold.
High-Side Gate Driver Supply (BST)
The gate drive voltage for the high-side, N-channel
MOSFET is generated by the flying capacitor boost cir-
cuit (Figure 4). The capacitor between BST and LX is
alternately charged from the external 5V bias supply
(V
DD
) and placed in parallel with the high-side MOS-
FET
’
s gate-source terminals.
On startup, the synchronous rectifier (low-side MOS-
FET) forces LX to ground and charges the boost
capacitor to 5V. On the second half of each cycle, the
switch-mode power supply turns on the high-side MOS-
FET by closing an internal switch between BST and DH.
This provides the necessary gate-to-source voltage to
turn on the high-side switch, an action that boosts the
5V gate drive signal above the system
’
s main supply
voltage (V+).
MOSFET Gate Drivers (DH, DL)
The DH and DL drivers are optimized for driving moder-
ately sized, high-side and larger, low-side power
MOSFETs. This is consistent with the low duty factor
seen in the notebook CPU environment, where a large
V
IN
- V
OUT
differential exists. An adaptive dead-time cir-
cuit monitors the DL output and prevents the high-side
FET from turning on until DL is fully off. There must be a
low-resistance, low-inductance path from the DL driver
to the MOSFET gate in order for the adaptive dead-time
circuit to work properly. Otherwise, the sense circuitry in
the MAX1980 will interpret the MOSFET gate as
“
off
”
while there is actually charge still left on the gate. Use
very short, wide traces (50mils to 100mils wide if the
MOSFET is 1 inch from the device). The dead time at
the other edge (DH turning off) is determined by a fixed
35ns internal delay.
The internal pulldown transistor that drives DL low is
robust, with a 0.4
(typ) on-resistance. This helps pre-
vent DL from being pulled up during the fast rise-time
of the LX node, due to capacitive coupling from the
drain to the gate of the low-side synchronous-rectifier
MOSFET. However, for high-current applications, some
combinations of high- and low-side FETs may cause
excessive gate-drain coupling, leading to poor efficien-
cy, EMI, and shoot-through currents. This is often reme-
died by adding a resistor less than 5
in series with
BST, which increases the turn-on time of the high-side
FET without degrading the turn-off time (Figure 4).
I
I
LIMIT(VALLEY)
= I
LOAD(MAX)
2 - LIR
2
η
(
)
TIME
0
I
PEAK
I
LOAD
I
LIMIT
MAX1980
V+
BST
DH
LX
(R
BST
)*
D
BST
C
BST
C
BYP
INPUT
(V
IN
)
N
H
L
( )*OPTIONAL—THE RESISTOR REDUCES
THE SWITCHING-NODE RISE TIME.
Figure 3.
“
Valley
”
Current-Limit Threshold Point
Figure 4. High-Side Gate Driver Boost Circuitry