參數(shù)資料
型號: MAX1778EUG
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 穩(wěn)壓器
英文描述: Quad-Output TFT LCD DC-DC Converters with Buffer
中文描述: 2.05 A SWITCHING REGULATOR, 1250 kHz SWITCHING FREQ-MAX, PDSO24
封裝: 4.40 MM, 1.10 MM HEIGHT, MO-153AD, TSSOP-24
文件頁數(shù): 31/38頁
文件大?。?/td> 1051K
代理商: MAX1778EUG
M
Quad-Output TFT LCD DC-DC
Converters with Buffer
______________________________________________________________________________________
31
Input-Output (Dropout) Voltage and Startup
A linear regulator
s minimum input-to-output voltage dif-
ferential (dropout voltage) determines the lowest use-
able supply voltage. Because the MAX1778/
MAX1881/MAX1883/MAX1884 use an internal PNP
transistor (or external NPN transistor), their dropout
voltage is a function of the transistor
s collector-to-emit-
ter saturation voltage (see
Typical Operating
Characteristics
). The linear regulator
s quiescent cur-
rent increases when in dropout.
The internal linear regulator will try to start up once its
supply voltage (V
SUPL
) exceeds 4V. When the linear
regulator powers up, the linear regulator may be in
dropout if the linear regulator
s output set voltage is
higher than its input supply voltage. Therefore, during
this brief period, the linear regulator draws additional
supply current until the input supply voltage exceeds
the output set voltage plus the pass transistor
s satura-
tion voltage (V
LDO(SET
) + V
CE(SAT)
).
VCOM Buffer (Operational
Transconductance Amplifier)
Buffer Output Voltage and Capacitor Selection
The positive input (BUF+) features dual mode opera-
tion. Connect BUF+ to GND for the preset VSUPB/2
output voltage, set by an internal 50% resistive-divider.
Adjust the amplifier
s output voltage by connecting a
voltage-divider from SUPB to BUF+ to GND (Figure 6).
Select R12 in the 10k
to 100k
range. Calculate R11
with the following equation:
where V
SUPB
may range from 4.5V to 13V, and V
BUF+
may range from 1.2V to (V
SUPB
- 1.2V). Connect a mini-
mum 1μF ceramic capacitor from BUFOUT to ground.
PC Board Layout and Grounding
Careful PC board layout is extremely important for
proper operation. Follow the following guidelines for
good PC board layout:
1) Place the main step-up converter output diode and
output capacitor less than 0.2in (5mm) from the LX
and PGND pins with wide traces and no vias.
2) Separate analog ground and power ground. The
ground connections for the step-up converter
s and
charge pump
s input and output capacitors should
be connected to the power ground plane. The lin-
ear regulator
s and VCOM buffer
s input and output
capacitors should be connected to a separate
power-ground path, star-connected to the PGND
pin to minimize voltage drops. When using multi-
layer boards, the top layer should contain the boost
R
R
V
V
SUPB
BUF
11
12
1
-
=
+
IN
SHDN
LDOOUT
LX
L1
6.8
μ
H
INPUT
V
IN
= 3.3V
C1
0.22
μ
F
C
OUT
(2) 4.7
μ
F
C
IN
4.7
μ
F
R1
274k
R2
49.9k
FB
GND
FBL
REF
Q1
INTG
PGND
C
REF
0.22
μ
F
MAX1778
MAX1883
(MAX1881)*
(MAX1884)*
R3
49.9k
R4
49.9k
C
LDO
1
μ
F
C3
0.01
μ
F
C2
0.01
μ
F
C
LDOOUT
4.7
μ
F
C
LDOIN
1
μ
F
R5
1.5k
MAIN
V
MAIN
= 8V
LDO
V
LDO
= 2.5V
SUPL
Figure 7. External Linear Regulator
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