參數(shù)資料
型號(hào): MAX1777EEI
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 穩(wěn)壓器
英文描述: 32-Bit Digital Signal Controller with ROM 100-BGA MICROSTAR -40 to 125
中文描述: DUAL SWITCHING CONTROLLER, 300 kHz SWITCHING FREQ-MAX, PDSO28
封裝: 0.150 INCH, 0.025 INCH PITCH, QSOP-28
文件頁數(shù): 27/32頁
文件大?。?/td> 497K
代理商: MAX1777EEI
M
High-Effic ienc y, Quad Output, Main Power-
S upply Controllers for Notebook Computers
______________________________________________________________________________________
27
Power MOS FET S elec tion
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
(>5A) when using high-voltage (>20V) AC adapters.
Low-current applications usually require less attention.
Choose a high-side MOSFET (N1/N3) that has conduc-
tion losses equal to the switching losses at the typical
battery voltage for maximum efficiency. Ensure that the
conduction losses at the minimum input voltage do not
exceed the package thermal limits or violate the overall
thermal budget. Ensure that conduction losses plus
switching losses at the maximum input voltage do not
exceed the package ratings or violate the overall ther-
mal budget.
Choose a synchronous rectifier (N2/N4) with the lowest
possible R
DS(ON)
. Ensure the gate is not pulled up by the
high-side switch turning on due to parasitic drain-to-gate
capacitance, causing cross-conduction problems.
Switching losses are not an issue for the synchronous
rectifier in the buck topology, since it is a zero-voltage
switched device when using the buck topology.
MOS FET Power Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET, the worst-case
power dissipation (PD) due to the MOSFET’s R
DS(ON)
occurs at minimum battery voltage:
Generally, a small high-side MOSFET reduces switch-
ing losses at high input voltage. However, the R
DS(ON)
required to stay within package power-dissipation limits
often limits how small the MOSFET can be. The opti-
mum situation occurs when the switching (AC) losses
equal the conduction (R
DS(ON)
) losses.
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum battery volt-
age is applied, due to the squared term in the CV
2
f
switching loss equation. Reconsider the high-side
MOSFET chosen for adequate R
DS(ON)
at low battery
voltages if it becomes extraordinarily hot when subject-
ed to V+
(MAX)
.
Calculating the power dissipation in N1/N3 due to
switching losses is difficult since it must allow for quan-
tifying factors that influence the turn-on and turn-off
times. These factors include the internal gate resis-
tance, gate charge, threshold voltage, source induc-
tance, and PC board layout characteristics. The follow-
ing switching loss calculation provides only a very
rough estimate and is no substitute for bench evalua-
tion, preferably including verification using a thermo-
couple mounted on N1/N3:
(
where C
RSS
is the reverse transfer capacitance of
N1/N3 and I
GATE
is the peak gate-drive source/sink
current.
For the synchronous rectifier, the worst-case power dis-
sipation always occurs at maximum battery voltage:
The absolute worst case for MOSFET power dissipation
occurs under heavy overloads that are greater than
I
LOAD(MAX)
but are not quite high enough to exceed
the current limit and cause the fault latch to trip. To
protect against this possibility, “overdesign” the circuit
to tolerate:
I
LOAD
= I
LIMIT(HIGH)
+ (LIR / 2 ) x I
LOAD(MAX)
where I
LIMIT(HIGH)
is the maximum valley current
allowed by the current-limit circuit, including threshold
tolerance and resistance variation.
Rec tifier S elec tion
Current circulates from ground to the junction of both
MOSFETs and the inductor when the high-side switch is
off. As a consequence, the polarity of the switching
node is negative with respect to ground. This voltage is
approximately -0.7V (a diode drop) at both transition
edges while both switches are off (dead time). The drop
is I
L
x R
DS(ON)
when the low-side switch conducts.
The rectifier is a clamp across the synchronous rectifier
that catches the negative inductor swing during the dead
time between turning the high-side MOSFET off and the
synchronous rectifier on. The MOSFETs incorporate a
high-speed silicon body diode as an adequate clamp
diode if efficiency is not of primary importance. Place a
Schottky diode in parallel with the body diode to reduce
the forward voltage drop and prevent the N2/N4 MOSFET
body diodes from turning on during the dead time.
Typically, the external diode improves the efficiency by
1% to 2%. Use a Schottky diode with a DC current rating
equal to one-third of the load current. For example, use
PD N
N
V
+
V
I
R
OUT
MAX
(
LOAD
DS
2
4
1
2
/
_
)
)
=
×
×
PD N N
switching
C
V
f
I
I
RSS
MAX
LOAD
GATE
1
3
2
/
×
(
)
)
=
+
×
×
PD N N resis
(
/
1
ce
V
V
I
R
OUT
+
MIN
LOAD
DS ON
(
tan
)
×
_
(
)
)
3
2
=
×
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