M
High-Efficiency, 10-Pin μMAX, Step-Down
Controllers for Notebooks
______________________________________________________________________________________
15
Examining the 2A circuit example with a maximum
R
DS(ON)
= 52m
at +85
°
C temperature reveals the fol-
lowing:
I
VALLEY
= 90mV / 52m
= 1.73A
Checking the corresponding I
LOAD(MAX) reveals:
A current-sense resistor can be connected from CS to
GND to set the current limit for the device. The
MAX1762/MAX1791 will use the sense resistor instead
of the R
DS(ON)
of Q2 to limit the current. The maximum
value of the sense resistor can be calculated with the
equation:
I
LIMIT
= 90mV / R
SENSE
Output Capacitor Selection
The output filter capacitor must have low enough effec-
tive series resistance (ESR) to meet output ripple and
load-transient requirements, yet have high enough ESR
to satisfy stability requirements. In CPU V
CORE
convert-
ers and other applications where the output is subject
to large load transients, the output capacitor
’
s size
depends on how much ESR is needed to prevent the
output from dipping too low under a load transient.
Ignoring the sag due to finite capacitance:
where V
DIP
is the maximum tolerable transient voltage
drop. In non-CPU applications, the output capacitor
’
s
size depends on how much ESR is needed to maintain
an acceptable level of output voltage ripple:
where Vp-p is the peak-to-peak output voltage ripple.
The actual microfarad capacitance value required
relates to the physical size needed to achieve low ESR,
as well as to the chemistry of the capacitor technology.
Thus, the capacitor is usually selected by ESR and volt-
age rating rather than by capacitance value (this is true
of tantalum, SP, POS, and other electrolytic-type
capacitors).
When using low-capacity filter capacitors such as
ceramics, capacitor size is usually determined by the
capacity needed to prevent V
SAG
and V
SOAR
from
causing problems during load transients. Generally,
once enough capacitance is added to meet the over-
shoot requirement, undershoot at the rising load edge
is no longer a problem (see the V
SAG
equation in the
Design Procedure
section).
The amount of overshoot due to stored inductor energy
can be calculated as:
where I
PEAK
is the peak inductor current.
Stability Considerations
Stability is determined by the value of the ESR zero
(f
ESR
) relative to the switching frequency (f). The point
of instability is given by the following equation:
where:
For a typical 300kHz application, the ESR zero frequen-
cy must be well below 95kHz, preferably below 50kHz.
Tantalum, Sanyo POSCAP, and Panasonic SP capaci-
tors in widespread use at the time of publication have
typical ESR zero frequencies of 20kHz. In the design
example used for inductor selection, the ESR needed
to support a specified ripple voltage is found by the
equation:
where LIR is the inductor ripple current ratio, and I
LOAD
is the average DC load. Using a LIR = 0.35 and an
average load current of 2A, the ESR needed to support
50mVp-p ripple is 71m
.
Do not use high-value ceramic capacitors directly
across the fast feedback inputs (FB to GND) without
taking precautions to ensure stability. Large ceramic
capacitors can have a high-ESR zero frequency and
cause erratic, unstable operation. However, it
’
s easy to
add enough series resistance by placing the capaci-
tors a couple of inches downstream from the junction of
the inductor and FB pin.
Unstable operation manifests itself in two related but dis-
tinctly different ways: double-pulsing and fast-feedback
loop instability. Double pulsing occurs due to noise on
the output or because the ESR is so low that there isn
’
t
enough voltage ramp in the output voltage signal. This
R
V
LIR
ESR
RIPPLE(p-p)
×
I
LOAD
=
≤
×
×
×
ESR
ESR
OUT
1
2
π
R
C
≤
ESR
π
V
LI
CV
PEAK2
OUT
≤
2
R
Vp-p
LIR I
ESR
LOAD(MAX)
≤
R
V
I
ESR
DIP
LOAD(MAX)
≤
I
1- 0.5 LIR
1.73A
1- 0.5 0.35
2.1A
LOAD(MAX)
VALLEY
I
=
=
=