參數(shù)資料
型號: MAX1497EPI
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: 3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers and レC Interface
中文描述: 1-CH PROPRIETARY METHOD ADC, PDIP28
封裝: 0.600 INCH, PLASTIC, MS-011AB, DIP-28
文件頁數(shù): 2/33頁
文件大?。?/td> 665K
代理商: MAX1497EPI
M
3.5- and 4.5-Digit, Single-Chip ADCs with LED
Drivers and μC Interface
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
AV
DD
to GND (MAX1499).........................................-0.3V to +6V
DV
DD
to GND (MAX1499) ........................................-0.3V to +6V
AIN+, AIN- to GND (MAX1499)...........VNEG to (AV
DD
to +0.3V)
REF+, REF- to GND (MAX1499)......... VNEG to (AV
DD
to +0.3V)
LOWBATT to GND (MAX1499) ................-0.3V to (AV
DD
+ 0.3V)
CLK,
EOC
,
CS
, DIN, SCLK,
DOUT to GND (MAX1499).......................-0.3V to (DV
DD
+ 0.3V)
VNEG to GND (MAX1499) .......................-2.6V to (AV
DD
+ 0.3V)
LED_EN to GND (MAX1499)....................-0.3V to (DV
DD
+ 0.3V)
ISET to GND (MAX1499)..........................-0.3V to (AV
DD
+ 0.3V)
V
DD
to GND (MAX1497)...........................................-0.3V to +6V
AIN+, AIN- to GND (MAX1497)..............VNEG to (V
DD
to +0.3V)
REF+, REF- to GND (MAX1497) ........... VNEG to (V
DD
to +0.3V)
CLK,
EOC
,
CS
, DIN, SCLK,
DOUT to GND (MAX1497)..........................-0.3V to (V
DD
+ 0.3V)
VNEG to GND (MAX1497)..........................-2.6V to (V
DD
+ 0.3V)
ISET to GND (MAX1497)............................-0.3V to (V
DD
+ 0.3V)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VLED to GLED..........................................................-0.3V to +6V
GLED to GND........................................................-0.3V to +0.3V
SEG_ to GLED..........................................-0.3V to (VLED + 0.3V)
DIG_ to GLED ..........................................-0.3V to (VLED + 0.3V)
DIG_ Sink Current.............................................................300mA
DIG_ Source Current...........................................................50mA
SEG_ Sink Current ..............................................................50mA
SEG_ Source Current..........................................................50mA
Maximum Current Input into Any Other Pin ........................50mA
Continuous Power Dissipation (T
A
= +70°C)
32-Pin TQFP (derate 20.7mW/°C above +70°C).....1652.9mW
28-Pin SSOP (derate 9.5mW/°C above +70°C) ...........762mW
28-Pin PDIP (derate 14.3mW/°C above +70°C)......1142.9mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
ELECTRICAL CHARACTERISTICS
(AV
DD
= DV
DD
= V
DD
= +2.7V to +5.25V, GND = 0, GLED = 0, V
LED
= +2.7V to +5.25V, V
REF+
- V
REF-
= 2.048V (external reference)
C
REF+
= C
REF-
= 0.1μF, C
VNEG
= 0.1μF. Internal clock mode, unless otherwise noted. All specifications are at T
A
= T
MIN
to T
MAX
.
Typical values are at T
A
= +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC ACCURACY
MAX1499
MAX1497
2.000V range
200mV range
-19,999
-1999
+19,999
+1999
Noise-Free Resolution
Count
±1
±1
Integral Nonlinearity (Note 1)
INL
Count
Range Change Ratio
(V
AIN+
- V
AIN-
= 0.100V) on 200mV range
(V
AIN+
- V
AIN-
= 0.100V) on 2.0V range
10:1
Ratio
Rollover Error
V
AIN+
- V
AIN-
= full scale
V
AIN-
- V
AIN+
= full scale
±1
Count
Output Noise
Offset Error (Zero Input Reading)
Gain Error
Offset Drift (Zero Reading Drift)
Gain Drift
INPUT CONVERSION RATE
External-Clock Frequency
External-Clock Duty Cycle
10
μV
P-P
Reading
%FSR
μV/
°
C
ppm/
°
C
Offset
V
IN
= 0 (Note 2)
(Note 3)
V
IN
= 0 (Note 4)
-0
-0.5
0
+0.5
0.1
±1
4.9152
MHz
%
40
60
Internal clock
External clock, f
CLK
= 4.9152MHz
5
5
Conversion Rate
Hz
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