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參數(shù)資料
| 型號： | MAX1497 |
| 廠商： | Maxim Integrated Products, Inc. |
| 元件分類： | LED驅(qū)動器 |
| 英文描述： | 3.5- and 4.5-Digit. Single-Chip ADCs with LED Drivers and 礐 Interface |
| 中文描述： | 3位半和4位半、單片ADC，帶有LED驅(qū)動器和µC接口 |
| 文件頁數(shù)： | 23/33頁 |
| 文件大?。?/td> | 665K |
| 代理商： | MAX1497 |
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M
3.5- and 4.5-Digit, Single-Chip ADCs with LED
Drivers and μC Interface
______________________________________________________________________________________
23
Default values: 0000h
In addition to automatic offset calibration, the
MAX1497/MAX1499 offer a user-defined custom offset
16-bit read/write register. The final result of the ADC
conversion is the input after autocalibration minus
the value in the custom offset. The custom offset value
is stored in this register. D15 is the MSB. The data is
represented in two’s complement format.
ADC Custom Offset-Calibration Register (Read/Write)
MSB
D15
LSB
D0
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
ADC Result Register 1 (Read Only)
MSB
LSB
(MAX1497)
LSB
(MAX1499)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Default values: 0000h
ADC result register 1 is a 16-bit read-only register. This
register stores the 16 MSBs of the ADC result. The data
is represented in two’s complement format.
For the MAX1499, the data is 16-bit and D15 is the
MSB. For the MAX1497, the data is 12-bit, D15 is the
MSB, and D4 is the LSB.
Default values: 0000h
The LED data register is a 16-bit read/write register.
This register updates from ADC result register 1 or from
the serial interface by selecting the SPI/
ADC
bit in the
control register. The data is represented in two’s com-
plement format.
For the MAX1499, the data is 16-bit and D15 is the
MSB. For the MAX1497, the data is 12-bit, D15 is the
MSB, and D4 is the LSB, followed by 4 trailing sub-bits.
LED Data Register (Read/Write)
MSB
LSB
(MAX1497)
LSB
(MAX1499)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
ADC Result Register 2 (Read Only)
MSB
LSB
D0
D3
D2
D1
0
0
0
0
Default values: 00h
ADC result register 2 is an 8-bit read-only register. This
register stores the 4 LSBs of the ADC result.
Use this result with the result in ADC result-register 1 to
form a 20-bit two’s complement conversion result.
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