參數(shù)資料
型號(hào)： MAX1446
廠商： Maxim Integrated Products, Inc.
英文描述： 10-Bit, 60Msps, 3.0V, Low-Power ADC with Internal Reference
中文描述： 10位、60Msps、3.0V、低功耗ADC，內(nèi)置基準(zhǔn)
文件頁(yè)數(shù)： 4/16頁(yè)
文件大小： 282K
代理商： MAX1446
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CLK
0.2 x
V
DD
Input Low Threshold
V
IL
PD,
OE
0.2 x
OV
D D
V
Input Hysteresis
V
HYST
I
IH
I
IL
C
IN
0.1
V
V
IH
= V
DD
= OV
DD
V
IL
= 0
±
5
±
5
Input Leakage
μA
Input Capacitance
DIGITAL OUTPUTS
(D9
–
D0)
Output Voltage Low
5
pF
V
OL
I
SINK
= 200μA
0.2
V
Output Voltage High
V
OH
I
SOURCE
= 200μA
OV
DD
-
0.2
V
Three-State Leakage Current
I
LEAK
OE
= OV
DD
±
10
μA
Three-State Output Capacitance
C
OUT
OE
= OV
DD
5
pF
POWER REQUIREMENTS
Analog Supply Voltage
Output Supply Voltage
V
DD
OV
DD
2.7
1.7
3.0
3.0
30
4
3.6
3.6
37
15
V
V
C
L
= 10pF
Operating, f
IN
= 19.943MHz at -0.5dBFS
Shutdown, clock idle, PD =
OE
= OV
DD
Operating, C
L
= 15pF, f
IN
= 19.943MHz at
-0.5dBFS
mA
μA
Analog Supply Current
I
VDD
7
mA
Output Supply Current
I
OVDD
Shutdown, clock idle, PD =
OE
= OV
DD
Offset
Gain
1
20
μA
mV/V
%/V
±
0.1
±
0.1
Power-Supply Rejection
PSRR
TIMING CHARACTERISTICS
CLK Rise to Output Data Valid
OE
Fall to Output Enable
OE
Rise to Output Disable
t
DO
Figure 5 (Note 3)
Figure 5
Figure 5
5
10
1.5
8
ns
ns
ns
t
ENABLE
t
DISABLE
CLK Pulse Width High
t
CH
Figure 6, clock period 16ns
8.3
±
2.5
ns
CLK Pulse Width Low
t
CL
Figure 6, clock period 16ns
8.3
±
2.5
ns
Wake-Up Time
t
WAKE
(Note 4)
1.5
μs
Note 1:
SNR, SINAD, THD, SFDR, and HD3 are based on an analog input voltage of -0.5dBFS referenced to a +1.024V full-scale
input voltage range.
Note 2:
Intermodulation distortion is the total power of the intermodulation products relative to the individual carrier. This number is
6dB better, if referenced to the two-tone envelope.
Note 3:
Digital outputs settle to V
IH
, V
IL
.
Note 4:
With R
EFIN
driven externally, REFP, COM, and REFN are left floating while powered down.
4
_______________________________________________________________________________________
M
10-Bit, 60Msps, 3.0V, Low-Power
ADC with Internal Reference
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.0V, OV
DD
= 2.7V; 0.1μF and 1.0μF capacitors from REFP, REFN, and COM to GND; V
REFIN
= 2.048V, REFOUT connected
to REFIN through a 10k
resistor, V
IN
= 2Vp-p (differential with respect to COM), C
L
≈
10pF at digital outputs, f
CLK
= 62.5MHz
(50% duty cycle), T
A
= T
MIN
to T
MAX
, unless otherwise noted.
≥
+25
°
C guaranteed by production test, <+25
°
C guaranteed by design
and characterization.Typical values are at T
A
= +25
°
C.)
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MAX1446EHJ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1446EHJ+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 60Msps 3V High Speed ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1446EHJ+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 60Msps 3V High Speed ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1446EHJ-T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1446GHJ+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 60Msps 3V High Speed ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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